{"paper":{"title":"DTCO of NOR-Type IGZO FeFETs for 3D Heterogeneous AI Memories: A Read-Centric Perspective","license":"http://creativecommons.org/licenses/by/4.0/","headline":"NOR-type IGZO FeFETs achieve 0.016 square micrometer SRAM-equivalent bitcells and sub-5 nanosecond random access for read-centric AI memories.","cross_cats":[],"primary_cat":"cs.ET","authors_text":"Arvind Sharma, Attilio Belmonte, Dwaipayan Biswas, Fernando Garc\\'ia-Redondo, Gouri Sankar Kar, Jan Van Houdt, Maarten Rosmeulen, Nicol\\`o Ronchi, Subhali Subhechha, Yang Xiang, Zhuo Chen","submitted_at":"2026-04-15T08:47:07Z","abstract_excerpt":"InGaZnO (IGZO)-channel FeFETs have attracted notable interest thanks to recent advances in endurance, opening up their application space for read-dominated AI memory tiers. This work evaluates the viability of NOR-type IGZO FeFETs for 3D heterogeneous AI memories from a read-centric design-technology co-optimization (DTCO) perspective, spanning on-chip back-end-of-line (BEOL) RAMs and hybrid-bonded memory chiplets, and off-chip, monolithically integrated 3D FeNOR storage-class memories (SCMs). For on-chip BEOL RAMs and memory chiplets, we demonstrate the cross-node bitcell footprint scalabilit"},"claims":{"count":4,"items":[{"kind":"strongest_claim","text":"We demonstrate the cross-node bitcell footprint scalability of back-end-of-line (BEOL) IGZO FeFETs capable of delivering 10-A SRAM-equivalent area (0.016 um2) with 7-nm ground rules and reaching sub-5 ns random access latency despite writability challenges.","source":"verdict.strongest_claim","status":"machine_extracted","claim_id":"C1","attestation":"unclaimed"},{"kind":"weakest_assumption","text":"The DTCO models and array simulations accurately capture physical sneak currents, sensing margins, and ferroelectric behavior without post-hoc parameter tuning or unstated material assumptions; this is not verifiable from the abstract alone.","source":"verdict.weakest_assumption","status":"machine_extracted","claim_id":"C2","attestation":"unclaimed"},{"kind":"one_line_summary","text":"NOR IGZO FeFET bitcells scale to 0.016 um2 SRAM-like area and sub-5 ns read latency but incur sensing margin loss from sneak currents unless positive-Vt engineering is applied.","source":"verdict.one_line_summary","status":"machine_extracted","claim_id":"C3","attestation":"unclaimed"},{"kind":"headline","text":"NOR-type IGZO FeFETs achieve 0.016 square micrometer SRAM-equivalent bitcells and sub-5 nanosecond random access for read-centric AI memories.","source":"verdict.pith_extraction.headline","status":"machine_extracted","claim_id":"C4","attestation":"unclaimed"}],"snapshot_sha256":"5277f728a568d6b4ea45dc1bc8a070c16b8d9638a15f149c442cb3d29cf641dd"},"source":{"id":"2604.13624","kind":"arxiv","version":2},"verdict":{"id":"67e66b40-bd0f-424d-87b3-3286b8e3d3e2","model_set":{"reader":"grok-4.3"},"created_at":"2026-05-10T12:13:27.365957Z","strongest_claim":"We demonstrate the cross-node bitcell footprint scalability of back-end-of-line (BEOL) IGZO FeFETs capable of delivering 10-A SRAM-equivalent area (0.016 um2) with 7-nm ground rules and reaching sub-5 ns random access latency despite writability challenges.","one_line_summary":"NOR IGZO FeFET bitcells scale to 0.016 um2 SRAM-like area and sub-5 ns read latency but incur sensing margin loss from sneak currents unless positive-Vt engineering is applied.","pipeline_version":"pith-pipeline@v0.9.0","weakest_assumption":"The DTCO models and array simulations accurately capture physical sneak currents, sensing margins, and ferroelectric behavior without post-hoc parameter tuning or unstated material assumptions; this is not verifiable from the abstract alone.","pith_extraction_headline":"NOR-type IGZO FeFETs achieve 0.016 square micrometer SRAM-equivalent bitcells and sub-5 nanosecond random access for read-centric AI memories."},"integrity":{"clean":true,"summary":{"advisory":0,"critical":0,"by_detector":{},"informational":0},"endpoint":"/pith/2604.13624/integrity.json","findings":[],"available":true,"detectors_run":[],"snapshot_sha256":"c28c3603d3b5d939e8dc4c7e95fa8dfce3d595e45f758748cecf8e644a296938"},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"}