{"id":"3fd6172f-b0b0-4396-9a4e-7ecc87ad2b13","arxiv_id":"2504.21200","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":3,"one_line_summary":"A turbo-equalization decoder for quantum LDPC codes models hook errors as correlated memory channels and achieves near-BPOSD0 decoding performance with linear complexity.","lead":"A new decoding method for quantum error correction turns a troublesome type of correlated error, hook errors, into a finite-state channel and equalizes it before belief propagation. The authors report matching the accuracy of a much slower standard decoder at a fraction of the complexity on two small quantum LDPC codes.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"The e = P f reduction omits direct data-qubit and target-side CNOT X errors; these enter only as virtual ancilla-fault patterns with priors set to p, so the BCJR equalizer solves a misspecified inference problem and the near-BPOSD0 claim rests on that mismatch.","rationale":"The reader's weakest_assumption correctly identifies the load-bearing modeling reduction. The paper offers a coherent construction for ancilla-induced hook errors, and Lemma 1 is plausible for bivariate bicycle codes; the message-passing equations and the O(n) complexity count are internally consistent. However, the central empirical claim depends on the exactness of e=P f. Direct data depolarizing noise and target-side CNOT X faults are present in the simulated circuit but absent from P, and the priors assigned to the virtual ancilla-fault patterns are not matched to the physical fault probabilities. The proposed restricted-noise comparison and the minimum-weight-f analysis would settle whether this model mismatch changes logical error rates in practice. This concern does not by itself invalidate the approach, but it justifies the conditional verdict pending such a check, consistent with the reader's assessment.","tokens_in":14382,"tokens_out":20056,"duration_ms":229922,"concrete_test":"Use Stim to implement the TA decoder for the [90,8,10] and [144,12,12] codes under two noise models: (A) the full circuit-level model of Section II.C, and (B) the same circuit with all noise removed except an X error on each X ancilla immediately before each CNOT, with probability p per error. Compare logical error rates at p = 10^-3 and 5*10^-3. If the rate under (A) is significantly above the rate under (B), or if the TA-to-BPOSD0 gap in (A) is larger than in (B), the omitted direct data and target-side faults are load-bearing and the e=P f model is incomplete. As a complementary analytic check, compute the minimum-weight f with P f = e for the errors sampled in (A) and tabulate how many direct single-qubit errors require weight >= 2; if that fraction is large, the BCJR priors in Eq. (18) under-count the likely physical fault patterns.","verdict_should_be":"UNCHANGED","load_bearing_attack":"Section III builds the joint graph from the hard constraint e = P f (Eq. (15)), where P contains only X-error-on-ancilla columns and the trellis in Fig. 5 enforces d_t = d_{t-1} + x_t. The simulated noise model in Section II.C additionally includes depolarizing noise on data qubits at the start of the circuit and X errors on the target side of faulty CNOTs. Neither of these is a column of P. The reduction to HJ = [[HZ, 0], [In, HX^T]] (Eq. (22)) and the prior p(x_t=1)=p for every ancilla fault therefore make the decoder solve a different Bayesian problem than the one simulated. For a stabilizer of weight rho, a direct error on the i-th data qubit is represented only as the XOR of two adjacent nested P-columns, except for the last position; that is a weight-2 ancilla-fault pattern, while the actual physical event is a single fault with probability about p/3 (initial depolarizing) or p/15 (CNOT target). The BCJR branch metrics in Eq. (9) then assign the direct-error explanation a prior proportional to p^2 instead of roughly p, exponentially down-weighting the most probable physical cause. The factor graph has no direct channel LLR for e, so the near-BPOSD0 performance reported in Section V is an empirical property of a mismatched decoder, not a consequence of the 'memory channel' derivation. Without a restricted-noise comparison or code release it is not established that the e=P f model is faithful for the full circuit-level noise model used in the simulations.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper proposes a decoder for QLDPC codes under a simplified circuit-level X-noise model. Rather than decoding on the full circuit-level Tanner graph, the authors model hook errors from each ancilla as a finite-state memory channel, group the per-ancilla fault variables into equalizer nodes that are processed by BCJR, and couple these equalizers to the Z Tanner graph of the code through constraint nodes. The resulting joint Tanner graph is claimed to preserve the degree and girth properties of the original code graph, to have O(n) complexity per iteration, and to outperform normalized min-sum decoding on the circuit-level graph while closely approaching BPOSD0 performance. Numerical results are reported for the [90,8,10] and [144,12,12] bivariate bicycle codes using a stim-based circuit-level noise model.","tokens_in":14764,"tokens_out":20280,"duration_ms":238492,"significance":"The equalizer-node construction is a conceptually interesting way to handle correlated hook errors without building the irregular circuit-level Tanner graph. If the model-fidelity issue raised below is resolved, the framework could be a useful scalable alternative to BPOSD. The paper contains a coherent derivation of the triangular propagation matrix, a plausible proof sketch in Lemma 1, an explicit complexity count, and comparisons against independent external baselines (MS and BPOSD0), which is the right kind of evidence for the central performance claim. The main weakness is that the reduced model's prior over effective data errors is not shown to match the simulated noise model, and no code or numerical data files are provided.","major_comments":[{"comment":"The factor graph defines the joint law over data errors e and ancilla faults f only through the deterministic constraint e = P f (or e = HX^T f after the equalizer merge), and the variable-node update in Eq. (25) has no explicit channel term for e. Under the noise model of Section II.C, however, there are independent depolarizing errors on data qubits at the start of the circuit and X errors on the target side of faulty CNOTs; neither is an ancilla fault. For a single stabilizer, the relation d_t = d_{t-1} + x_t in Eq. (17) maps a lone data error at an interior position to a pair of adjacent ancilla faults, so the induced prior on that data error is proportional to p^2 rather than the physical p/3 (initial depolarizing X) or p/15 (CNOT target X). Consequently, the BCJR branch metrics in Eq. (9) systematically down-weight the most probable physical explanation for a single-qubit data error. The paper does not add explicit data-error LLRs, nor does it prove that the column space of P contains weight-1 representatives with matching priors for every data qubit of the simulated codes. Without this, the near-BPOSD0 curves in Section V are an empirical property of a mismatched decoder rather than a consequence of the memory-channel derivation. I would ask for either a restricted-noise validation (only ancilla faults) or a corrected model that includes data-error channel priors, or a proof that the effective prior induced by e = P f with p(x_t=1)=p coincides with the simulated noise model.","section":"Section III.A, Eqs. (15) and (22); Section IV, Eq. (25)"},{"comment":"The central performance claim rests on two plots with no numerical tables, no confidence intervals beyond the stated stopping rule, and no code or data release. Given the model-mismatch concern above, the reader cannot distinguish a robust advantage of the equalizer architecture from a parameter-regime coincidence. The authors should provide the underlying logical error rates with uncertainties, or a public implementation of the decoder and the stim circuit, and should also report the sensitivity of the results to the diversity-decoding configuration and to the normalized min-sum parameter beta = 0.875, since these choices come from prior work and are not optimized in this paper.","section":"Section V, Figs. 9 and 10"}],"minor_comments":[{"comment":"There is a typo: 'An FSM is can be represented by its state diagram' should read 'An FSM can be represented by its state diagram'.","section":"Section II.E"},{"comment":"The displayed matrices are difficult to verify because of the line breaks and row alignment. Please ensure the matrices are typeset with explicit dimensions or delimiters so that the reader can check the claim that P(1) reduces to G under the row permutation.","section":"Example 1 and Eq. (21)"},{"comment":"The captions of Figs. 9 and 10 state only the codes; please state explicitly in the text or captions that the ordinate is the logical error rate and the abscissa is the per-component fault probability p, and clarify how the 'minimum number of failures to stop' rule translates into error bars.","section":"Section V"},{"comment":"Reference [4] is missing publication year and venue information; please complete the citation.","section":"References"}],"recommendation":"major_revision","confidential_remarks":"The manuscript is likely publishable after the model-fidelity question is addressed. The equalizer framework is novel and the mismatch appears fixable by adding explicit data-error priors or by restricting the noise model to ancilla faults. The lack of code and numerical data is a secondary reproducibility concern. I do not recommend rejection because the central derivation is coherent and the empirical comparison against independent baselines is appropriate in spirit."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Two things to know. The decoder idea is real: modeling hook errors as a finite-state memory channel and equalizing them with BCJR inside the QLDPC Tanner graph is a new combination, executed with care. The trellis reduction, the explicit Lemma 1, and the preservation of the original code graph's girth and degree are all credible, and the O(n) complexity count checks out. The near-BPOSD0 claim, though, should be treated as provisional, because the joint graph enforces e = P f, which leaves no room for the direct data-qubit X errors that the simulated circuit actually contains.\n\nWhat the paper does well: the construction in Sec. III is clearly explained, the baselines (MS and BPOSD0) are the right ones, and the results show a real gap over MS and, for the [90,8,10] code, a close approach to BPOSD0. That is enough to warrant a serious referee.\n\nThe soft spot is the one the stress-test flags. The simulated circuit in Sec. II.C includes depolarizing noise on data qubits at the start. That is a single X error with probability about p/3. In the joint graph there is no channel LLR for the data-error variable e; the only way to produce such an error is a pair of ancilla faults, each with prior p, so the model down-weights the most probable physical cause by a factor of p. The same issue applies to target-side CNOT X faults. The paper does not run a restricted-noise experiment (no direct data depolarization) to establish that this mismatch is harmless, and no code or error bars are provided. This means the near-BPOSD0 performance in Figs. 9 and 10 is an empirical property of a mismatched decoder, not a direct consequence of the memory-channel derivation.\n\nMinor: the statement that the decoding graph 'preserves' the original graph's properties is a bit loose; it preserves the original Tanner graph structure, but the equalizer nodes change the message-passing behavior. The heuristics, beta = 0.875 and MS-PI, are borrowed from prior work and not tested for sensitivity here. These are minor.\n\nBottom line: the idea deserves referee time. The fix is to add an explicit direct-error variable or run a restricted-noise comparison, and to release code and data. If that shows the mismatch is benign, the paper is a genuine step forward; if not, it still has a useful architecture worth discussing. I would send it in with a request for revision.","headline":"A genuinely new decoder construction with a plausible but unverified modeling step; the near-BPOSD0 claim needs a restricted-noise test before it can be called solid.","tokens_in":15277,"tokens_out":4928,"would_cite":false,"duration_ms":53610,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":["81P70","94B35"],"pacs":["03.67.Pp"],"model":"deepseek-v4-flash","headline":"A decoder that treats hook errors as finite-state memory channels and integrates BCJR equalizers into the code graph comes close to BPOSD0 performance while keeping $O(n)$ complexity.","keywords":["quantum error correction","hook errors","circuit-level noise","QLDPC codes","belief propagation","BCJR equalizer","turbo equalization","stabilizer measurement circuits"],"falsifier":"Simulate the same $X$-error circuit with an independent depolarizing error channel on data qubits in addition to ancilla and CNOT faults, feed the same syndrome to the turbo annihilation decoder while forcing direct data errors to be represented only through the per-ancilla fault priors, and compare with BPOSD0 on the $[90,8,10]$ code at $p=10^{-3}$; if the decoder's logical error rate no longer tracks BPOSD0, then the assumed reduction of all data errors to per-ancilla fault patterns is refuted.","tokens_in":14170,"feed_emoji":"⚛️","tokens_out":11174,"duration_ms":99399,"temperature":0.7,"pith_summary":"This paper proposes a method for decoding quantum LDPC codes by estimating the cumulative effect of hook errors on data qubits, rather than locating individual faults in the measurement circuit. Hook errors from each ancilla are modeled as a two-state memory channel, and BCJR equalizers are fused into the code's Tanner graph, producing a turbo annihilation decoder. The paper reports that this decoder runs in $O(n)$ operations per iteration, keeps the code graph's degree regularity and girth, and on the $[90,8,10]$ and $[144,12,12]$ bivariate bicycle codes outperforms min-sum decoding on the circuit-level graph while approaching the logical error rates of belief propagation with order-0 ordered-statistics decoding (BPOSD0) at low fault probabilities. If true, this removes the cubic-complexity OSD post-processing step that usually makes circuit-level decoding impractical for large codes and repeated syndrome extraction.","feed_headline":"Decoder fixes hook errors in linear time, close to OSD0 accuracy","feed_subtitle":"Models ancilla faults as memory channels, letting BCJR equalizers replace cubic-complexity ordered-statistics decoding.","key_machinery":"The load-bearing object is the upper-triangular propagation matrix $G$, whose recursive relation $d_t = d_{t-1} \\oplus x_t$ turns each ancilla fault process into a two-state finite-state machine with a trellis. BCJR runs on that trellis to produce extrinsic log-likelihood ratios for the effective data errors, and Lemma 1 shows that every column block of the fault-to-data matrix $P$ reduces to $G$ after a row permutation, so the noisy fault graph can be replaced by equalizer nodes without changing the code's Tanner graph structure. The resulting joint graph $H_J$, with top block $[H_Z\\,0]$ and bottom block $[I_n\\,H_X^T]$, preserves variable and check degrees and girth, which is what lets standard min-sum message passing succeed where circuit-level belief propagation fails.","core_discovery":"The central discovery is that hook errors look like a channel with memory when seen from the data qubits. For a stabilizer of weight $\\rho$, an $X$ fault on the ancilla at time step $t$ propagates to data qubits $d_t,\\ldots,d_\\rho$, and the accumulated error satisfies $d_t = d_{t-1} \\oplus x_t$, so each ancilla defines a two-state finite-state machine. The paper proves (Lemma 1) that for bivariate bicycle codes the fault-to-data matrix $P$ can be row-permuted into the upper-triangular staircase matrix $G$, which lets all faults belonging to one ancilla be merged into a single 'equalizer node' decoded by BCJR. The joint Tanner graph then collapses to the matrix $H_J$ with top block $[H_Z\\,0]$ and bottom block $[I_n\\,H_X^T]$, with one equalizer per $X$ stabilizer, and decoding alternates min-sum updates on the code graph with BCJR extrinsic messages. The paper's simulations show this turbo annihilation decoder outperforms normalized min-sum on the circuit-level Tanner graph and approaches BPOSD0 on both tested bivariate bicycle codes, at linear per-iteration complexity.","pith_inferences":["Beyond the paper: if the $e=Pf$ reduction generalizes to measurement errors, the same equalizer-node construction could treat consecutive syndrome-extraction rounds as an outer memory channel, potentially removing OSD from full fault-tolerant decoding pipelines.","Beyond the paper: the per-ancilla trellis has only two states, so replacing BCJR with a cheaper soft-input soft-output estimator such as MMSE equalization could reduce the reported 9 operations per trellis layer and make the decoder attractive at very high code rates.","Beyond the paper: since the decoder estimates effective data errors rather than fault locations, its error floor will depend on the weight distribution of effective errors induced by the circuit schedule; different CNOT orderings should shift that distribution and are a testable design knob.","Beyond the paper: the observation that the first columns of $P(x)$ coincide with $H_X(x)^T$ suggests an algebraic characterization of which stabilizer-measurement schedules admit the staircase reduction; codes or schedules that fail Lemma 1 would need a different node grouping to avoid 4-cycles."],"forward_implications":["Per-iteration decoding cost becomes $2n(\\gamma+1)+10m\\rho$, which is $O(n)$, so the decoder remains practical for large codes and for repeated rounds of syndrome extraction.","The joint graph $H_J$, with top block $[H_Z\\,0]$ and bottom block $[I_n\\,H_X^T]$, keeps the degree regularity and girth of the original code graph, eliminating the short cycles and degree-1 variable nodes that hurt circuit-level belief propagation.","On the $[90,8,10]$ and $[144,12,12]$ bivariate bicycle codes, the decoder beats normalized min-sum on the circuit-level graph and approaches BPOSD0 at low fault probability $p$.","Because the same reasoning applies with $X$ and $Z$ swapped, the method covers $Z$-type hook errors as long as the corresponding stabilizer measurement uses perfect CNOTs in the symmetric experiment.","Diversity decoding with three variants, two layered schedules and one flooding schedule, using min-sum with past influence and a normalization factor $\\beta=0.875$, is part of the method that achieves convergence without ordered-statistics post-processing."],"supporting_citations":[{"why":"Defines the circuit-level Tanner graph model whose structural problems (short cycles, degree-1 nodes, cubic OSD cost) are the baseline the paper's method is designed to fix.","marker":"[1]"},{"why":"Supplies the turbo equalization concept: iteratively exchanging soft information between a SISO estimator for a memory channel and a belief-propagation decoder.","marker":"[5]"},{"why":"Provides the BCJR algorithm used as the local soft-input soft-output equalizer on each ancilla's trellis.","marker":"[7]"},{"why":"Shows graph-based decoding in the presence of intersymbol interference, the classical analogue of joint decoding over the code and channel graphs.","marker":"[8]"},{"why":"Introduces joint message-passing decoding of LDPC codes and partial-response channels, the design template for the joint Tanner graph.","marker":"[9]"},{"why":"Defines bivariate bicycle codes and supplies the [90,8,10] and [144,12,12] instances used in the numerical comparisons.","marker":"[11]"},{"why":"Provides the min-sum with past influence update rule used in the diversity decoders to improve convergence.","marker":"[15]"},{"why":"The fast stabilizer-circuit simulator used to sample circuit-level fault patterns and syndromes for the performance curves.","marker":"[16]"}],"fun_headline_variants":["Turbo-annihilation: BCJR equalizers fix hook errors in linear time","Hook faults as memory channels: decoder approaches OSD0 at linear cost","Staircase matrix turns ancilla faults to trellis decoding","Linear-time decoder approaches OSD0 on bivariate bicycle codes","Turbo decoder outperforms BP, closes in on OSD0"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The model assumes every error on a data qubit can be represented as the output of the small memory process attached to the measuring ancilla, with the prior chance of an ancilla fault set to $p$; if direct data-qubit depolarizing errors and target-side CNOT faults cannot be absorbed into those virtual ancilla fault patterns, the decoder's priors are misspecified and the reported near-BPOSD0 performance may not hold outside the simulated noise regime.","fun_headline_variants_meta":{"raw":{"variants":["Turbo-annihilation: BCJR equalizers fix hook errors in linear time","Hook faults as memory channels: decoder approaches OSD0 at linear cost","Staircase matrix turns ancilla faults to trellis decoding","Linear-time decoder approaches OSD0 on bivariate bicycle codes","Turbo decoder outperforms BP, closes in on OSD0"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000328,"raw_usage":{"total_tokens":1847,"prompt_tokens":976,"completion_tokens":871,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":592,"completion_tokens_details":{"reasoning_tokens":777}},"tokens_in":592,"tokens_out":871,"duration_ms":8008,"temperature":1.0,"reasoning_tokens":777,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-16T05:12:50.712976+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Simulate the same $X$-error circuit with an independent depolarizing error channel on data qubits in addition to ancilla and CNOT faults, feed the same syndrome to the turbo annihilation decoder while forcing direct data errors to be represented only through the per-ancilla fault priors, and compare with BPOSD0 on the $[90,8,10]$ code at $p=10^{-3}$; if the decoder's logical error rate no longer tracks BPOSD0, then the assumed reduction of all data errors to per-ancilla fault patterns is refuted.","supporting_citations":[{"cited_title":"Improved Decoding of Circuit Noise and Fragile B oundaries of Tailored Surface Codes,","cited_arxiv_id":null,"evidence_quote":"Defines the circuit-level Tanner graph model whose structural problems (short cycles, degree-1 nodes, cubic OSD cost) are the baseline the paper's method is designed to fix."},{"cited_title":"Turbo Equalization: An Ove rview,","cited_arxiv_id":null,"evidence_quote":"Supplies the turbo equalization concept: iteratively exchanging soft information between a SISO estimator for a memory channel and a belief-propagation decoder."},{"cited_title":"Optimal Deco ding of Linear Codes for Minimizing Symbol Error Rate (Corresp.),","cited_arxiv_id":null,"evidence_quote":"Provides the BCJR algorithm used as the local soft-input soft-output equalizer on each ancilla's trellis."},{"cited_title":"Graph-Based Decoding in t he Presence of ISI,","cited_arxiv_id":null,"evidence_quote":"Shows graph-based decoding in the presence of intersymbol interference, the classical analogue of joint decoding over the code and channel graphs."},{"cited_title":"Joint Message-Pass ing Decoding of LDPC Codes and Partial-Response Channels,","cited_arxiv_id":null,"evidence_quote":"Introduces joint message-passing decoding of LDPC codes and partial-response channels, the design template for the joint Tanner graph."},{"cited_title":"High-Threshold and Low-Overhead Fault-Tolerant Q uantum Memory,","cited_arxiv_id":null,"evidence_quote":"Defines bivariate bicycle codes and supplies the [90,8,10] and [144,12,12] instances used in the numerical comparisons."},{"cited_title":"Stim: a Fast Stabilizer Circuit Simulator,","cited_arxiv_id":null,"evidence_quote":"The fast stabilizer-circuit simulator used to sample circuit-level fault patterns and syndromes for the performance curves."}],"review_version":1}