{"id":"9e9ab507-4c9d-4afc-bc2d-e981da67f87b","arxiv_id":"2505.15413","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":0,"one_line_summary":"Deterministic quantum circuits prepare Dicke states in depth O(log k log(n/k)+k) with all-to-all connectivity and O(k log(n/k)+n_2) or O(n_2) on an n1 x n2 grid, with lower bounds showing near-optimality in several regimes.","lead":"This paper gives faster quantum circuits for preparing Dicke states, a standard type of entangled state used in quantum algorithms. The new circuits improve known depth bounds under both all-to-all qubit connectivity and 2D grid connectivity, and prove matching lower bounds for some settings.","discovery_kind":"extension","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Theorem 13's stated bound is false at k=1: it predicts constant-depth W-state preparation, contradicting the paper's own Ω(log n) lower bound; the proof's depth sum drops the per-layer constant when log k = 0.","rationale":"I read the paper's central claim as Theorem 13. The most load-bearing problem I find is not the Lemma 6/CQSP depth formula (which is plausible and from prior work), but a corner case that invalidates the theorem as stated: k=1 gives O(1) depth, yet the paper's own Theorem 20 proves Ω(log n) for all k, and the W state is a well-known example requiring Ω(log n) even with all-to-all connectivity. The proof's asymptotic manipulation Σ_j O(log k) = O(log(n/k) log k) silently assumes log k ≥ 1; for k=1 the per-layer constant is not captured. This is fixable by writing O(log(k+1) log(n/k)+k) or handling k=1 separately, so the verdict remains CONDITIONAL rather than REJECT. The reader's identified weakest assumption is different; I see no fatal flaw there, though it deserves the requested tightening. My concrete test settles the k=1 issue analytically by evaluating the proof's own sum.","tokens_in":22698,"tokens_out":23521,"duration_ms":201739,"concrete_test":"Evaluate the depth sum in the proof of Theorem 13 at k=1. With d=⌊log(n/k)⌋=log n layers and N_j = n/2^{j-1} - 2k, Lemma 12 gives each layer depth O(1) (indeed O(log k + k^2/(k+N_j)) = O(1) for k=1), so the exact sum is Θ(log n). This contradicts the claimed O(log(k)log(n/k)+k)=O(1). A direct simulation of the divide-and-conquer circuit for n=4 and n=8 with k=1 would show depth increasing by one per added layer, confirming the missing Θ(log n) term.","verdict_should_be":"UNCHANGED","load_bearing_attack":"Theorem 13 states depth O(log(k) log(n/k)+k) for all 1≤k≤n/2. For k=1 this is O(1), predicting constant-depth preparation of |D^n_1>, the W state, under all-to-all connectivity. This contradicts Theorem 20's lower bound Ω(log n), which applies to k=1: Eq. (33)–(34) show the two-qubit reduced state is not a tensor product for k=1, so every pair of qubits must have intersecting light cones, requiring depth Ω(log n). The error is in the proof's depth summation: each divide layer has depth O(log k + k^2/(k+N_j)), and the proof replaces Σ_j O(log k) by O(log(n/k) log k), valid only when log k ≥ 1. For k=1 the log term vanishes, but each of the d=⌊log(n/k)⌋=log n divide layers costs Ω(1), so the total is Ω(log n), not O(1). The correct all-to-all bound should be O(log(k+1) log(n/k)+k), or k=1 handled separately. This is a concrete internal inconsistency with the paper's own lower bound and with the table entry claiming an improvement over the known O(log n) W-state depth.","agreement_with_reader":"disagree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper proposes deterministic quantum circuits for preparing n-qubit k-weight Dicke states under all-to-all and 2D-grid connectivity, claiming depth O(log(k) log(n/k)+k) for all-to-all and O(k log(n/k)+n_2) (or O(n_2) when k under all-to-all connectivity, which contradicts the paper's own Theorem 20 lower bound Ω(log n) (Eqs. (33)-(34) show the two-qubit reduced state is not a product for k=1). The error is in the proof's depth summation: the term Σ_j O(log k) is replaced by O(log(n/k) log k), which is valid only when log k ≥ 1; for k=1 each of the d=⌊log(n/k)⌋ divide layers still costs Ω(1), giving Ω(log n). The theorem statement should be corrected to O(log(k+1) log(n/k)+k), or the case k=1 should be handled separately, and Table 1 should be updated accordingly.","section":"Theorem 13 and its proof, Section 3.1"},{"comment":"The proof of the all-to-all lower bound asserts that if d=o(log n), one can find two sequences of reachable sets P'_1 and Q'_1 with P'_1∩Q'_1=∅ and |P'_1|=o(n), |Q'_1|=o(n). This does not follow from the stated bound |S'_i|≤2^{d-i+2}: a family of n subsets of [n] of size n^{o(1)} can be pairwise intersecting (for example, all sets containing a fixed element), so small light cones do not by themselves guarantee two disjoint ones. The paper needs an additional argument that two qubits of the Dicke state have disjoint light cones under the assumed shallow circuit, or a different proof technique. The same gap affects the grid and path lower bounds, since they rely on the same disjoint-light-cone step.","section":"Theorem 20, lower-bound proof"},{"comment":"The application of Lemma 6 in Eq. (20) is under-specified in a way that is load-bearing for the all-to-all depth claim. Lemma 6 as quoted does not state that the m ancillary qubits are restored to |0^m> after the controlled state preparation, yet Lemma 12 immediately reuses the same N ancillary qubits in Eqs. (21)-(24). If the CQSP from [YZ23] leaves the ancilla entangled with the data registers, the subsequent steps are not valid. The authors should either quote the full lemma including the ancilla-return guarantee, or provide a short argument that the ancilla are clean. In addition, the target states in Eq. (20) are superpositions of binary basis states on the low ⌈log(k+1)⌉ qubits of the k-qubit registers, while Lemma 6 prepares arbitrary n-qubit states; the mapping of the high k-⌈log(k+1)⌉ qubits should be made explicit.","section":"Lemma 12, Eq. (20), and Lemma 6"},{"comment":"The proof of Theorem 14, Case 1, assumes that √(n_1 k/n_2), √(n_2 k/n_1), √(n/k), n/k, and r are integers and states that 'we can choose their ceiling values as the actual values, which do not change the order of the final circuit depth.' This is not justified: exact block dimensions determine the number of blocks, the recursion depth, and the permutation distances, so the ceiling operation can break the stated recurrence unless a padding or rounding argument is supplied. The authors should provide a rigorous treatment of non-integer block sizes, for example by allowing blocks of slightly different sizes and verifying that the depth recurrence remains O(k log(n/k)+n_2).","section":"Theorem 14, grid partition"}],"minor_comments":[{"comment":"The phrase 'Over the past decades, Over the past decades,' is duplicated and should be reduced to one occurrence.","section":"Introduction, first paragraph"},{"comment":"The transition from Eq. (22) to Eq. (23) is hard to follow because the inverse of U_plus is applied with a non-default register ordering: the third k-qubit register in that application is S_2, not W. The text says 'Eq. (23) can be implemented by a inverse circuit of U_plus,' but it should explicitly state the register permutation (S_1, W, S_2) so that the reader can verify the calculation.","section":"Lemma 12, Eqs. (22)-(23)"},{"comment":"The depth formula in Lemma 6 appears to contain a missing superscript: the term '2n+k' should presumably be '2^{n+k}'. Please correct the notation and also state explicitly that the m ancillary qubits are returned to their initial state.","section":"Lemma 6, statement"},{"comment":"The labeling of the qubit sets is inconsistent: the target register T is written as {t_k,t_k-1,...,t_1} in the circuit description but the clearing step refers to 'the first p qubits {t_p,...,t_1}'. Using a consistent least-significant-first ordering would remove ambiguity.","section":"Lemma 9, proof"},{"comment":"The sentence 'Assume that S'_{d+1} is the set of the upper left (lower right) vertex of the grid' is terse; it should say that one starts from two output qubits located at opposite corners of the grid and tracks their reachable sets backward.","section":"Theorem 20, proof of grid lower bound"}],"recommendation":"major_revision","confidential_remarks":"The k=1 inconsistency in Theorem 13 is a genuine internal contradiction with the paper's own lower bound and with the known W-state depth; it is fixable by stating the bound as O(log(k+1) log(n/k)+k) or by treating k=1 separately, but it must be fixed before publication. The lower-bound proof gap concerning the existence of disjoint light cones is more serious and may require a substantial rewrite, although the Ω(log n) all-to-all bound itself is known to be true. The paper also relies heavily on the authors' own earlier lemmas; this is acceptable if those lemmas are stated precisely, especially the ancilla-restoration property in Lemma 6."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"First thing you should know: the main results are real, and the k=1 bug is real too. Theorem 13 states depth O(log k log(n/k)+k) for all 1≤k≤n/2. At k=1 that is O(1), which would prepare the W-state in constant depth under all-to-all connectivity—impossible, and exactly contradicted by their own Theorem 20 lower bound Ω(log n). The error is in the depth sum: each divide layer costs O(log k + ...), but when log k = 0 the per-layer constant is still Ω(1), and there are ⌊log n⌋ layers. The correct statement should be O(log(k+1) log(n/k)+k), or handle k=1 separately as the known O(log n) W-state circuit. This is a statement-and-proof bug, not a collapse of the whole paper.\n\nWhat is genuinely new: the all-to-all bound O(log k log(n/k)+k) for k≥2, the grid bounds O(k log(n/k)+n_2) and O(n_2), and the lower bounds. The hybrid one-hot/binary encoding with idle qubits as workspace is a real technique. The cited heavy tools (CQSP, permutation routing, CNOT parallelization) come from the authors' earlier papers, but those lemmas are general and independently relevant, so the self-citation is not a circularity problem.\n\nWhere the soft spots are, in order of severity:\n\nLemma 12, the core divide-unitary construction, omits register swaps in Eqs (22)–(23). The inverse U_plus is applied to (S, third, middle), which is not the physical register order; you need a swap layer that isn't mentioned. This is fixable, but as written the step doesn't follow.\n\nThe grid proof handwaves ceilings for non-integer block dimensions and contains at least one clear typo: Eq (26) puts an (n-n1k+τ-ℓ)-length state on S_{1,2}, which has only k qubits. The intended meaning is recoverable, but the text is wrong.\n\nThe abstract's near-optimality claim is softer than stated: there remains a k-versus-log n gap for all-to-all, and the Ω(k) lower bound is a conjecture, not proven.\n\nWho this is for: anyone working on shallow state preparation, symmetric states, QAOA initial states, or grid-constrained compilation. The lower-bound section is a clean light-cone argument and worth reading on its own. The paper deserves a serious referee. I'd send it to peer review with a request for major revision: fix the k=1 bound, patch the swap in Lemma 12, clean up the grid partition typos, and qualify the near-optimality claim. After that, the main claims should stand.","headline":"Genuine depth improvements for Dicke state preparation, but Theorem 13's all-to-all bound is false at k=1, contradicting the paper's own lower bound; an easy fix, but it needs to be made.","tokens_in":23531,"tokens_out":9540,"would_cite":true,"duration_ms":73163,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":["81P68","68Q12"],"pacs":["03.67.Lx"],"model":"deepseek-v4-flash","headline":"The paper proves that deterministic Dicke state preparation with all-to-all qubit connectivity can be done in depth $O(\\log(k)\\log(n/k)+k)$, improves grid-constrained depths, and establishes matching lower bounds.","keywords":["Dicke state","quantum circuit depth","deterministic state preparation","all-to-all connectivity","grid connectivity","divide-and-conquer","depth lower bound","controlled quantum state preparation"],"falsifier":"Compile the divide unitary of Lemma 12 for $k=16$ with $N=2k$, $N=8k$, and $N=32k$ idle helper qubits and count actual two-qubit gate layers; Lemma 12 predicts the $k^2/(k+N)$ term drops from about 8 to 2.5 to 0.5 layers, so the last circuit should be essentially as shallow as its $O(\\log k)$ base, whereas a controlled-state-preparation step that cannot be sped up by ancillas would keep the depth near $O(k)=16$ layers and disprove Theorem 13.","tokens_in":22460,"feed_emoji":"⚛️","tokens_out":11863,"duration_ms":102968,"temperature":0.7,"pith_summary":"The paper establishes depth-efficient deterministic circuits for preparing $n$-qubit Dicke states $|D^n_k\\rangle$, the uniform superposition of all $k$-one bit strings, using only standard 1- and 2-qubit gates and no measurement or dedicated ancillary qubits. Its headline result is that with all-to-all qubit wiring the depth is $O(\\log(k)\\log(n/k)+k)$, beating the previous best $O(k\\log(n/k))$ for every $k\\le n/2$. On an $n_1\\times n_2$ grid the depth becomes $O(k\\log(n/k)+n_2)$ when $k\\ge n_2/n_1$ and $O(n_2)$ when $k