{"id":"dc3ba1df-d029-4765-aa81-2f446b7795d8","arxiv_id":"2506.16682","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":7.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":2,"one_line_summary":"A two- and three-layer bucket-brigade QRAM was realized on a superconducting processor, achieving query fidelities up to 0.800 with a router-qubit error-mitigation scheme.","lead":"Researchers built a working two- and three-layer bucket-brigade quantum random access memory on a superconducting processor. It reads classical data through a tree of quantum routers and stays accurate even when parts of the tree are noisy.","discovery_kind":"new_method","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Post-selected query fidelities may be inflated by router-measurement collapse under residual error-induced entanglement; the SI error-mitigation proof (Eqs. S20–S22) has a related gap.","rationale":"The reader identified the same primary soft spot: the router post-selection is unbiased only if the routers are truly disentangled from the address/data registers after a full query cycle. I agree that this is the most load-bearing assumption for the headline fidelity numbers, because the reported EM gains are defined through this projection. My stress-test adds a concrete and internal reason to worry: the SI proof of error mitigation (Section I.B) contains a set-inclusion error when relating DK to Kr; errors from deeper layers can propagate into the first K layers, so the equality in Eq. S20 is not justified and the prefactor is dropped before Eq. S22. This does not overturn the experimental demonstration of a two- and three-layer QRAM, nor the qualitative error-localization data, but it does mean the quantitative EM fidelities and the scalability of partial-layer EM should be verified independently. Because the manuscript is already CONDITIONAL due to missing data/code and the post-selection assumption, my read does not change the verdict; it strengthens the reason for conditioning rather than moving to accept or reject.","tokens_in":22742,"tokens_out":19896,"duration_ms":218470,"concrete_test":"Run a noisy simulation of the two-layer circuit with the paper's Pauli error model (Methods) and compute three quantities: (i) the unconditional fidelity of the address/data registers; (ii) the fidelity after simulating projective Z-measurement of all routers and post-selecting on |0>; (iii) the fidelity conditioned on the actual simulated Pauli-error configuration having no error on any router qubit (error-flag post-selection without measurement collapse). If (ii) exceeds (iii) by more than the statistical uncertainty, router measurement collapse biases the EM fidelity reported in Fig. 2c. Separately, re-derive Eq. S20 using the correct identity p(c|Kr) = p(c and Kr)/p(Kr); if the prefactor sum_{c in DK} p(c)/p(Kr) is not close to 1 for the simulated noise rates, the bound in Eq. S22 does not follow and the scalability claim for partial-layer EM is unsupported.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The central experimental numbers (two-layer EM fidelity 0.800, and the improvements in Figs. 2c–2e) are obtained by measuring all router qubits after the query and keeping only shots where every router is in |0>. The unbiasedness of this post-selection requires the ideal-cycle claim that routers are fully disentangled from the address and data registers (Main text, 'QRAM performance'). Under gate noise this disentanglement is only approximate: errors can leave residual correlations between a router's |0>/|1> degree of freedom and the address/data state. Projective router measurement then conditions the retained address/data state on a syndrome that need not coincide with 'no error occurred', so the conditional fidelity can overstate the true query fidelity of the kept ensemble. The paper offers no independent check of this, such as a noisy simulation comparing projective post-selection with exact conditioning on simulated error flags. The SI proof of the error-mitigation method has a related gap: Eq. S20 writes F' >= (1/p(Kr)) * sum_{c in DK} p(c) F(c), but DK = {no errors in first K layers} does not imply the event Kr = {first K router layers end in |0>}, because deeper errors can propagate upward; the later replacement of p(Kr) by sum_{c in DK} p(c) + O(epsilon) is therefore not justified, and the claimed scalability of partial-layer post-selection is not established.","agreement_with_reader":"partial"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper reports an experimental implementation of a bucket-brigade QRAM on a superconducting processor. The authors introduce a hardware-efficient gate decomposition for the quantum routing operation that reduces the CZ depth relative to controlled-SWAP-based routing, use quantum teleportation to preserve logarithmic query depth when mapping the binary-tree architecture onto a square grid, and demonstrate two- and three-layer QRAM queries with fidelities up to 0.800 ± 0.026 and 0.604 ± 0.005. They also propose an error-mitigation protocol that post-selects on all router qubits being in |0>, study error propagation by injecting depolarizing errors on individual routers, and use noisy simulations to extrapolate the query fidelity to larger QRAM sizes.","tokens_in":23014,"tokens_out":6405,"duration_ms":69543,"significance":"If the central claims hold, this is a valuable experimental step: it is one of the first end-to-end demonstrations of a bucket-brigade QRAM on a programmable superconducting processor. The hardware-efficient routing decomposition, the teleportation-based layout, and the error-localization measurements in Fig. 3a are concrete contributions with explicit resource counts in SI Table I. The paper is also honest about what is simulated versus measured, and the data availability statement is a plus. However, the error-mitigation protocol is load-bearing for the headline fidelity numbers, and its validity depends on an ideal disentanglement assumption that is only approximately satisfied under noise; the current manuscript does not supply the missing check.","major_comments":[{"comment":"The error-mitigated fidelities are obtained by measuring all router qubits after the full query and keeping only shots where every router is in |0>. The unbiasedness of this post-selection relies on the claim that the router qubits are completely disentangled from the address and data registers before and after a full query cycle. Under gate noise this disentanglement is only approximate: errors can leave residual correlations between a router's |0>/|1> degree of freedom and the address/data state, so projective router measurement can condition the retained state on a syndrome that does not coincide with 'no error occurred'. The paper provides no independent check of this, such as a noisy simulation comparing projective post-selection with exact conditioning on simulated error flags, or a comparison of post-selected and unconditioned fidelities against a simulated ground truth. Because the headline numbers (0.800 ± 0.026 for two-layer queries and the improvements in Figs. 2c–2e) all use this post-selection, this gap is load-bearing for the main experimental claim.","section":"Main text, 'QRAM performance' (Fig. 2c–2e)"},{"comment":"The proof that partial-layer post-selection is scalable and improves fidelity is not rigorous. The event DK = {no errors in the first K router layers} is not contained in Kr = {the first K router layers end in |0>}, because errors in deeper layers can propagate upward and flip routers in the first K layers; conversely, some errors in the first K layers, such as phase errors on routers in superposition states, may not be detected by a Z-basis |0> measurement. The later replacement of p(Kr) by sum_{c in DK} p(c) + O(epsilon) is therefore not justified. Since this is the basis for the claim that the method 'possesses a certain degree of scalability' and for Eq. (S22), the scalability conclusion is not established by the present argument.","section":"SI Sec. I.B, Eqs. (S20)–(S22)"}],"minor_comments":[{"comment":"The conclusion states that the bucket-brigade QRAM 'exhibits polylogarithmic scaling of query infidelity with respect to gate errors', but the SI bound (Eq. S16) is polylogarithmic in the memory size N and linear in the gate error rate; this wording should be corrected to avoid conflating the two scalings.","section":"Main text, Conclusion"},{"comment":"The sample-size estimate around Eq. (S17) should clarify that the post-selection probability p(Kr) is itself estimated from the same data, so the confidence statement is approximate; this is a statistical presentation issue rather than a technical flaw.","section":"SI Sec. I.B"},{"comment":"The caption of Fig. 1c should specify whether the CZ-depth comparison for the H-tree recursive mapping includes the teleportation overhead; as written, the comparison between the two approaches is ambiguous.","section":"Figure 1c"},{"comment":"The manuscript contains several OCR/garbled-character artifacts, for example in the author list and in the Supplementary Information equations and figures; these need to be cleaned before publication.","section":"Throughout"}],"recommendation":"major_revision","confidential_remarks":"The stress-test concern is real and should be addressed before publication. The most effective fix would be a noisy numerical simulation that directly compares the post-selected fidelity with a reference 'true' query fidelity conditioned on simulated error flags, plus a corrected version of the SI proof that replaces the unjustified DK/Kr identification with a proper event-inclusion argument. If the authors provide these, the paper would be a solid experimental contribution. I do not see grounds for rejection: the routing decomposition, teleportation integration, and error-localization measurements are independently valuable, and the error-mitigation issue is fixable within the scope of a revision."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"The headline: this is the first full multi-layer bucket-brigade QRAM query on a programmable superconducting processor, and it deserves serious referee time. The two- and three-layer demonstrations—post-selected query fidelities of 0.800±0.026 and 0.604±0.005—are internally consistent, with error bars and readout calibration. The router decomposition work is genuinely reusable.\n\nWhat's actually new: the subspace-adapted router unitaries (U', U'', U''') cut CZ depth by more than 30% versus controlled-SWAP (10 CZ vs 16 in the key configuration), with QASM files posted. They verify the optimized unitaries against the controlled-SWAP implementation, so the benchmark isn't circular. The teleportation-based mapping cleanly answers the H-tree latency problem on a 2D grid; their teleportation fidelity, 0.994±0.005, is solid. The three-layer error-injection data in Fig. 3a—queried path degrades roughly 12x faster than unqueried paths—are the clearest experimental evidence to date for bucket-brigade error localization, and the entanglement-entropy measurement in Fig. 3b complements it. The router post-selection error mitigation is simple and effective, and the citation pattern is fair; the router-only precursors and theory papers are all credited.\n\nMinor: the scalability exponent α≈−2.688 is model-dependent (hand-set es/et=1/10, Pauli depolarizing), and the data and code are not public yet. For an experimental milestone, data availability should be a publication condition.\n\nModerate: the post-selection bias concern is real, though it doesn't kill the paper. Routers fully disentangled from address/data after a full cycle is an ideal-circuit statement; under gate noise the router-|0> syndrome is an imperfect proxy for 'no error occurred,' so the post-selected fidelities may be inflated. The missing check is a noisy simulation comparing projective post-selection with exact conditioning on simulated error flags. It should be added; the qualitative findings will likely survive.\n\nModerate: the SI error-mitigation proof has a genuine gap. Eq. S20 treats DK (no errors in the first K router layers) as if it were contained in Kr (first K routers end in |0>). It isn't—deeper errors can propagate up and excite a shallower router. The later replacement p(Kr) ≈ Σ_{c in DK} p(c) + O(ε) is asserted, not derived. The result is probably salvageable for small ε, and Fig. S2 backs the qualitative claim, but the proof needs tightening.\n\nWho it's for: experimental quantum-architecture groups, QRAM theorists, and algorithm people who need honest near-term QRAM numbers. My recommendation: engage with it, send it to peer review, and require the SI fix, the bias check, and public data. The core demonstration is a genuine step forward.","headline":"First full multi-layer bucket-brigade QRAM on a superconducting processor, with reusable router decompositions—worth a serious referee, but the post-selection and the SI proof both need tightening.","tokens_in":23628,"tokens_out":14946,"would_cite":true,"duration_ms":134049,"reading_group":"yes","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":[],"model":"deepseek-v4-flash","headline":"Quantum RAM queries hit 80 percent fidelity on a superconducting chip.","keywords":["bucket-brigade quantum random access memory","superconducting quantum processor","quantum error mitigation","quantum teleportation","gate decomposition","noise resilience","query fidelity","quantum memory"],"falsifier":"Perform a full two-layer query on a known address-data state, then measure every router qubit in the X basis as well as the Z basis and reconstruct the address-data state conditioned on each router outcome; if the conditioned state depends on which router basis was measured, or if post-selecting on |0> routers changes the address-data density matrix more than the known readout-error budget allows, the disentanglement assumption is violated and the reported post-selected fidelities are biased.","tokens_in":22550,"feed_emoji":"⚛️","tokens_out":5163,"duration_ms":46629,"temperature":0.7,"pith_summary":"This paper reports the first end-to-end experimental realization of a bucket-brigade quantum random access memory (QRAM) on a programmable superconducting processor, for two- and three-layer memory trees holding four and eight classical bits. The authors argue that a QRAM, which lets a quantum computer read classical data in superposition, is a prerequisite for quantum speedup in many algorithms, and that until now almost all evidence for the bucket-brigade design was theoretical. Their experiments achieve post-selected query fidelities up to 0.800 ± 0.026 for two layers and 0.604 ± 0.005 for three layers, and they present the first experimental evidence that errors in the unqueried branches stay localized rather than spreading into the queried data. If the architecture scales as the simulations suggest, near-term superconducting processors could serve as practical QRAM devices for quantum algorithms.","feed_headline":"Quantum RAM queries hit 80 percent fidelity on a superconducting chip","feed_subtitle":"End-to-end two- and three-layer experiments show localized errors and a path toward scalable quantum memory.","key_machinery":"The load-bearing object is the bucket-brigade tree of quantum routers, each acting as a four-body routing operation that sends the data bus left or right depending on the address qubit. The paper's technical engine is a hardware-efficient gate decomposition: because routing occurs only in restricted subspaces, the full controlled-SWAP can be replaced by a functionally equivalent unitary that requires fewer CZ gates depending on connectivity, reducing total CZ depth by over 30%. Quantum teleportation of the data bus between layers preserves the O(log N) latency on a 2D grid. The error-mitigation machinery uses the router qubits themselves as error indicators: after a complete query they should be disentangled and in |0>, so post-selecting on that outcome filters out error events without additional circuits.","core_discovery":"The central claim is that a bucket-brigade QRAM, a binary tree of quantum routers that directs a quantum signal to the memory cell named by a quantum address, can be built and run on a square-grid superconducting processor while preserving the architecture's logarithmic time scaling and noise resilience. To do this, the authors replace the conventional controlled-SWAP-based router with a functionally equivalent unitary that needs only 10 CZ gates in the most favorable connectivity, cutting circuit depth by more than 30%, and they use quantum teleportation to connect layers without an exponentially growing communication cost. They then exploit the fact that router qubits return to |0> after a full query cycle: measuring them and discarding runs in which any router is excited raises the two-layer fidelity from an average near 0.64 to 0.800 ± 0.026, and improves a GHZ-state preparation fidelity by over 0.13. In a three-layer system, injecting depolarizing errors into a queried router degrades fidelity roughly linearly with slope -0.2549, while the same errors in distant unqueried branches are nearly harmless with slope -0.0053, which the authors take as direct experimental evidence for the localization of errors and the origin of the architecture's noise resilience.","pith_inferences":["The reported 0.800 fidelity is the post-selected number; the raw average for two-layer queries is about 0.64, so the true hardware performance before error mitigation remains a significant gap that future demonstrations will need to close.","The teleportation step used in the two-layer demo is post-selected on a Bell-state outcome rather than feed-forward corrected; the paper notes feed-forward would be needed for scalability, so a natural next experiment is to close that loophole.","Because the gate decomposition exploits QRAM-specific subspace constraints, the same optimization could be imported into other memory architectures built from routing trees wherever controlled-SWAP gates appear.","The error-localization evidence suggests a practical systems-level rule: place the most error-prone physical qubits in the deepest, least-queried branches of the tree, where their noise is most shielded from the queried path."],"forward_implications":["The more-than-30% reduction in CZ depth directly lowers the noise burden of each query, making deeper QRAM trees more feasible on current hardware.","The router-qubit error mitigation boosts query fidelity across all address superpositions and doubles as a diagnostic that can identify which branches of the memory suffered errors.","The measured branch-dependence of error sensitivity confirms that errors in unqueried branches are largely shielded, supporting the theoretical polylogarithmic infidelity scaling of the bucket-brigade design.","Numerical scalability analysis predicts that the gate error rate needed for a fixed target fidelity decays as a power law with exponent about -2.688 in the number of layers, suggesting that error-corrected superconducting processors could run large QRAMs."],"supporting_citations":[{"why":"Introduces the bucket-brigade QRAM architecture that the experiment realizes.","marker":"[18]"},{"why":"Supplies the theoretical resilience and infidelity-scaling analysis that the experiment's error-localization claims build on.","marker":"[21]"},{"why":"Gives the hardware-efficient QRAM proposal whose controlled-SWAP router the experiment optimizes.","marker":"[24]"},{"why":"Provides the H-tree recursive mapping baseline whose connectivity overhead the teleportation scheme avoids.","marker":"[23]"},{"why":"Establishes the logarithmic time complexity and robustness of bucket-brigade QRAM, the target the experiment preserves.","marker":"[27]"},{"why":"Demonstrates a deterministic quantum router on a superconducting platform, the routing primitive this work scales up.","marker":"[33]"},{"why":"Demonstrates coherent quantum routers for bucket-brigade QRAM on a superconducting processor, the closest prior experimental step.","marker":"[34]"},{"why":"Supplies the quantum teleportation protocol used to connect QRAM layers with constant-depth communication.","marker":"[35]"},{"why":"Provides the connectivity-aware controlled-SWAP decompositions used as the baseline for the paper's gate counts and fidelity comparisons.","marker":"[36]"},{"why":"Underlies the efficiently-computable-sparse simulation method used for the scalability analysis.","marker":"[41]"}],"fun_headline_variants":["First bucket-brigade QRAM runs on superconducting chip","Quantum RAM hits 80% fidelity with error mitigation","Bucket-brigade QRAM: noise-resilient and realized","Superconducting QRAM: 30% shorter, 80% faithful","Quantum random access memory: proof-of-principle on chip"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The whole error-mitigation and fidelity-reporting scheme assumes that after a complete query the router qubits are perfectly disentangled from the address and data registers and sit in |0>, so measuring them and keeping only the |0> outcomes removes errors without touching the queried state; any residual entanglement would bias the reported fidelities upward.","fun_headline_variants_meta":{"raw":{"variants":["First bucket-brigade QRAM runs on superconducting chip","Quantum RAM hits 80% fidelity with error mitigation","Bucket-brigade QRAM: noise-resilient and realized","Superconducting QRAM: 30% shorter, 80% faithful","Quantum random access memory: proof-of-principle on chip"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000195,"raw_usage":{"total_tokens":1382,"prompt_tokens":996,"completion_tokens":386,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":612,"completion_tokens_details":{"reasoning_tokens":299}},"tokens_in":612,"tokens_out":386,"duration_ms":4187,"temperature":1.0,"reasoning_tokens":299,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-15T19:21:18.084010+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Perform a full two-layer query on a known address-data state, then measure every router qubit in the X basis as well as the Z basis and reconstruct the address-data state conditioned on each router outcome; if the conditioned state depends on which router basis was measured, or if post-selecting on |0> routers changes the address-data density matrix more than the known readout-error budget allows, the disentanglement assumption is violated and the reported post-selected fidelities are biased.","supporting_citations":[{"cited_title":"Lloyd, S","cited_arxiv_id":null,"evidence_quote":"Introduces the bucket-brigade QRAM architecture that the experiment realizes."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Gives the hardware-efficient QRAM proposal whose controlled-SWAP router the experiment optimizes."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Provides the H-tree recursive mapping baseline whose connectivity overhead the teleportation scheme avoids."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Demonstrates a deterministic quantum router on a superconducting platform, the routing primitive this work scales up."},{"cited_title":"Implementation of a quantum addressable router using superconducting qubits","cited_arxiv_id":"2503.04295","evidence_quote":"Provides the connectivity-aware controlled-SWAP decompositions used as the baseline for the paper's gate counts and fidelity comparisons."}],"review_version":2}