{"id":"b8a3b2bf-d6c2-4508-988e-773880c12814","arxiv_id":"2608.02789","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":6.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":6,"one_line_summary":"PACE-QAOA reduces the QAOA qubit count for power-system islanding with a symmetry-fixed encoding and slack-free Lagrangian constraints, and reports feasible solutions up to 89 buses.","lead":"This paper presents a qubit-efficient QAOA formulation for controlled power-system islanding, using graph contraction, a symmetry-fixed binary encoding, and classical Lagrangian multipliers to shrink the quantum register. It reports feasible islanding solutions on IEEE systems from 9 to 89 buses and claims linear per-layer gate complexity for fixed island counts on sparse grids.","discovery_kind":"extension","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Feasibility of the end-to-end results rests on the unspecified repair map P from [19]; without its specification or a correctness proof, the reported feasible solutions and final cuts are not reproducible.","rationale":"The resource-scaling core of the paper is largely sound: for fixed K, the term counts in Section 4.6 follow from the stated QUBO forms, and Theorem A.1 correctly establishes that E2 is an exact symmetry reduction of E1 over the feasible set. The difficulty is that the paper's end-to-end feasibility and solution-quality claims depend on a black-box repair map P that is neither specified nor proven correct. Section 3.3 says only that P applies greedy single-bus reassignment descent on the QUBO-side energy Q(z) followed by a DFS connectivity repair pass and cites [19]. Since the phase separator's connectivity term is admitted to be only a necessary surrogate, P is the sole mechanism enforcing constraints (15), (11), and the load-presence part of (12). Theorem A.1 does not cover P's output. Tables 5-7 report post-P feasibility and cut values, so without a specification or a proof that P terminates with a feasible partition for every input, the benchmark results cannot be independently reproduced and the phrase consistently produces feasible islanding solutions is not established. The concrete test above, running the actual P over the actual or random bitstrings and checking constraints (10)-(15), would settle whether this gap is real. This is the same weakest assumption the reader identified, so I agree with the conditional verdict rather than moving it.","tokens_in":37314,"tokens_out":10645,"duration_ms":102795,"concrete_test":"Obtain the actual P implementation or pseudocode from [19]; run it on all raw QAOA bitstrings used for Tables 5-7, or if unavailable, on 10^6 uniform random bitstrings of the E2 register for each benchmark, and verify that every repaired output satisfies constraints (10)-(15): exactly K nonempty connected components, |V_k| >= N_min, and generator and load presence in each island. If any infeasible output occurs, the feasibility claim fails and the reported rates need re-benchmarking. Also check idempotence of P and that for at least one system its output cut c_f(tilde z) matches the corresponding reported c_f.","verdict_should_be":"UNCHANGED","load_bearing_attack":"The resource-complexity claim in Section 4.6 is internally consistent: for fixed K, the phase-separator term count M_E2,Lag=O(E+F+N) and interaction degree O(Delta_G) follow from the stated QUBO forms, and Theorem A.1 correctly shows that encoding E2 preserves the constrained optimum over the encoded feasible set. However, the central practical claim, that the framework consistently produces feasible, high-quality islanding solutions, does not follow from these guarantees. Every measured bitstring is converted to a final islanding decision by the classical repair map P in Eq. (74), described only as greedy single-bus reassignment descent on the QUBO-side energy Q(z) followed by a DFS connectivity repair pass and attributed to [19]. No pseudocode, invariants, or correctness proof is provided. P is the only component enforcing hard constraints (10)-(15), since the phase separator's connectivity term H_c in Eq. (51) is admitted to be necessary, not sufficient, for connectivity. Theorem A.1 therefore applies to the encoded feasible set, not to the output of the hybrid pipeline. The feasibility rates and cut values in Tables 5-7 are all post-P numbers; if P can fail, or if Q(z) is undefined, those results are not reproducible and the feasibility claim is unverified. This is the load-bearing gap: the scaling analysis can stand alone, but the application-level feasibility conclusion is not established without P.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper proposes PACE-QAOA, a hybrid quantum-classical formulation for controlled power-system islanding. The main technical contributions are two compact encodings (E1 and E2) that reduce the QAOA register from K N0 qubits to (K-1)(N-|A|) qubits, a slack-free Lagrangian treatment for minimum-island-size and load/generator-presence constraints, and complexity bounds showing that, for fixed island count K on sparse graphs, the phase-separator term count and per-layer gate count become O(E+F+N) with circuit depth O(p Δ_G). The authors prove an encoding-hierarchy theorem (Theorem A.1) stating that E2 preserves the constrained optimum and reduces label-symmetry multiplicity from K! to one. They then present benchmark results on IEEE 9- to 89-bus systems across several quantum backends, a factorial ablation attributing resource gains to the encoding and Lagrangian components, a noise-resilience study, and landscape diagnostics. The central practical claim is that the framework consistently produces feasible, high-quality islanding solutions at scales that fit on a 156-qubit backend.","tokens_in":37665,"tokens_out":6993,"duration_ms":64824,"significance":"If the claims hold, the paper makes a useful contribution to constrained QAOA in an application domain. The encoding hierarchy is cleanly stated, Proposition 2.2 and Theorem A.1 appear mathematically sound, and the complexity accounting in Section 4 is internally consistent: the reduction from O(E0+N0^2) to O(E+F+N) and depth O(p Δ_G) follows from the stated QUBO forms once the Lagrangian treatment removes slack registers. The ability to run an 89-bus islanding instance on 154 qubits is a tangible demonstration of qubit efficiency. The empirical validation is less secure: the final feasibility claims depend on a classical repair map P that is only described by reference to an unpublished preprint, and several quantitative tables are mutually inconsistent. The paper would be significantly strengthened by a self-contained specification and correctness argument for P, reconciliation of the tables, and at least one classical baseline for the reported cut values.","major_comments":[{"comment":"The end-to-end feasibility claim rests on the repair map P, but P is never specified. Eq. (74) defines z-tilde = P(z) only as 'greedy single-bus reassignment descent on the QUBO-side energy Q(z) followed by a DFS connectivity repair pass', attributed to reference [19]. The quantity Q(z) is not defined anywhere in the manuscript, and no pseudocode, invariants, termination argument, or correctness proof is provided. Since the phase-separator connectivity term H_c in Eq. (51) is explicitly admitted to be only necessary for connectivity, and constraints (11) and (12) are not in the QUBO, P is the only component that enforces the hard constraints (10)-(15) on measured samples. Every feasibility rate and final cut in Tables 5-7 is a post-P number. Without a specification of P and a proof that it always terminates with a partition satisfying connectivity, minimum island size, and generator/load presence, the conclusion that the framework 'consistently produces feasible islanding solutions' is not established. I request that the authors provide the full routine, including the definition of Q(z), and either prove its correctness or state and verify the conditions under which it can fail.","section":"Section 3.3, Eq. (74)"},{"comment":"The empirical support is undermined by inconsistent feasibility rates for the same configuration. For IEEE 14-bus under E2 with the Lagrangian formulation on IBM, Table 6 reports a feasibility rate of 0.400, while Table 7 reports 0.360 for Formulation (v) and Table 8 also reports 0.360 for the IBM row. For IEEE 24-bus, Table 6 reports 0.411 and Table 7 reports 0.454. For IEEE 39-bus, Table 6 reports 0.762 and Table 7 reports 0.758. Section 5.4 states that the IBM results in Table 8 'correspond to Table 7', which only sharpens the conflict with Table 6. Because the feasibility rate is central to the claim of consistent feasible sampling, these discrepancies must be reconciled, and the experimental protocol (which runs are averaged, how feasibility is computed per shot or per trial, and why the same row in Tables 5-7 differs) must be stated unambiguously.","section":"Tables 6 and 7; Table 8"},{"comment":"The qubit counts for the full one-hot baseline are inconsistent between the resource table and the ablation table. For IEEE 57-bus, Table 2 lists 140 qubits for Formulation (i) while Table 7 lists 130; for IEEE 24-bus the values are 108 vs. 96; for IEEE 30-bus, 86 vs. 84; and for IEEE 14-bus, 43 vs. 44. The text in Section 4.7 says the Table 2 values for systems up to 89 buses 'correspond to the executed benchmark records in Tables 5 and 6', but Table 7 is the ablation that actually reports executed qubit counts. This discrepancy matters because the paper's central resource comparison, including the claim that Formulation (v) reduces the register from 321 to 154 qubits on IEEE 89-bus, depends on which baseline definition is correct. The authors should clarify whether Formulation (i) in the ablation uses the physical graph or the working graph, and ensure that Table 2 and Table 7 use the same definition.","section":"Table 2 vs. Table 7; Section 4.7 vs. Section 5.3"},{"comment":"The paper repeatedly describes the solutions as 'high-quality' and the framework as producing 'feasible, high-quality islanding solutions', but no classical baseline is provided to support that evaluation. The cut values in Tables 4-6 are compared only across variants of the proposed QAOA pipeline. Without a comparison to an established classical method for the same islanding formulation, such as a MILP solver, spectral clustering, or the authors' own classical greedy repair applied to random or optimized samples, the word 'high-quality' is not operationalized. If the intended claim is only that the quantum pipeline recovers the same cut as its own non-Lagrangian variants, that should be stated explicitly; if the claim is that the solutions are close to a known optimum, the relevant optimality gap or classical baseline must be reported.","section":"Section 5.2, Tables 4-6; Section 6"}],"minor_comments":[{"comment":"The title contains a typo: 'Slack-free ineqality evaluation' should read 'Slack-free inequality evaluation'.","section":"Proposition 3.1 title"},{"comment":"Equation (75) ends with a trailing comma after the closing bracket; this should be a period or the equation should be completed.","section":"Eq. (75)"},{"comment":"Both the repair map P and the proof of Lemma 2.1 are delegated to the same-authors' unpublished preprint [19]. For a journal submission, I recommend making the cut-preservation argument self-contained and at least summarizing the repair routine, so that the refereed version is verifiable independently of a non-archival source.","section":"Section 3.3, Eq. (74) and Lemma 2.1"},{"comment":"The noise-resilience analysis is limited to four systems up to 30 buses because of the 32-qubit simulator limit; the text acknowledges this, but the conclusion in Section 6 that the framework is 'resilient to the tested device noise' should note more prominently that the largest executed systems (39- to 89-bus) were not included in the noisy comparison.","section":"Section 5.4, Table 8"},{"comment":"The ablation table reports feasibility rates as single values without repeated-run statistics or error bars; statements such as 'the feasibility rate improves for five systems' should be supported by multiple independent trials, especially for the low-rate cases such as IEEE 24-bus.","section":"Section 5.3, Table 7"}],"recommendation":"major_revision","confidential_remarks":"The formal encoding hierarchy and complexity analysis are the strongest parts of the paper and are worth preserving. My main concern is that the empirical and resource claims are not yet reproducible: the repair map P is unspecified, and key tables disagree on numbers that are central to the conclusions. I would not reject the paper, because these issues are fixable within the manuscript's scope, but the authors should be asked to supply a full specification and correctness argument for P, correct the table inconsistencies, and add at least one classical baseline before the paper can be accepted."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"Two things to know. First, the encoding hierarchy E1/E2 is the real deal: the symmetry-fixed encoding with canonical anchor labels is proved exact (Prop. 2.2, Thm. A.1) and reduces the register from K N to (K-1)(N-|A|). The complexity analysis is consistent with the stated QUBO forms. Second, the experimental 'feasible islanding' results are all filtered through a classical repair map P taken from the authors' unpublished preprint [19], which is described in one sentence and not specified or proved. That is the load-bearing gap.\n\nWhat is new: the K! symmetry-breaking via coherent anchor groups is a clean idea that transfers to any constrained graph partition with distinguished vertices. The slack-free Lagrangian placement is a standard trick (evaluate hinge violations on samples, update multipliers classically) but it is applied cleanly here and removes auxiliary qubits. The linear per-layer depth on bounded-degree graphs is a meaningful asymptotic improvement over the quadratic slack-based baseline. The experiments are extensive: eight IEEE systems, multiple backends, noise model, ablation, landscapes. The qubit counts in Table 2 are plausible.\n\nWhere it is soft: (1) The repair map P. No pseudocode, no invariants, no correctness proof. The paper says P is greedy single-bus reassignment on the QUBO energy plus a DFS connectivity pass. Since the phase-separator connectivity term H_c is admitted to be necessary but not sufficient, P is the only thing enforcing constraint (15). If P can fail on some samples, the reported feasibility rates are not reproducible. Fix this before acceptance, or soften the claims to 'solutions that passed the specific repair routine used here.' (2) Table inconsistency: feasible rates for the same configuration differ between Table 6 and Table 7 (e.g., IEEE 14-bus: 0.400 vs. 0.360; IEEE 24-bus: 0.411 vs. 0.454). Minor, but sloppy. (3) 'High-quality' is only benchmarked against other QAOA formulations, not against classical solvers like Gurobi or spectral clustering. That is a missing baseline for a power-systems audience. (4) Power-flow validation is aggregate margins only; the paper acknowledges it is not full AC feasibility. Fine as a sanity check, not a substitute.\n\nOverall: the theoretical core is solid and likely correct; the experiments are broad but the feasibility claim is under-specified. This paper deserves peer review, but the repair routine has to be specified or removed from the central claim. For QAOA encoding work, the hierarchy is worth citing; for power-systems readers, treat the empirical feasibility numbers with caution until P is pinned down.","headline":"A genuinely qubit-efficient QAOA encoding for islanding with exactness proofs, but the end-to-end feasibility claims rest on an unspecified repair routine from the authors' own preprint.","tokens_in":38192,"tokens_out":4143,"would_cite":true,"duration_ms":36012,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":["81P68","90C27"],"pacs":[],"model":"deepseek-v4-flash","headline":"The paper claims that power-system islanding, an NP-hard graph partition problem, can be reduced to a qubit-efficient QAOA formulation whose phase separator scales linearly in system size on sparse grids, without changing the optimal set…","keywords":["QAOA","power system islanding","qubit-efficient encoding","Lagrangian constraint handling","QUBO","controlled islanding","hybrid quantum-classical optimization","near-term quantum hardware"],"falsifier":"Run the full pipeline on any benchmark system, log every raw measured bitstring together with the repaired partition, and check each repaired partition for exact DFS connectivity, minimum island size, and generator/load presence; a single failed sample disproves the claim that the framework consistently produces feasible islanding solutions.","tokens_in":37116,"feed_emoji":"⚡","tokens_out":6474,"duration_ms":60038,"temperature":0.7,"pith_summary":"Controlled islanding splits a stressed power grid into self-sustaining islands, but it is NP-hard and conventional QAOA encodings exhaust the qubit budget of near-term hardware. This paper proposes a hybrid formulation that encodes only the essential island-assignment decisions and moves operational constraints into a classical Lagrangian loop, so the quantum register stays small. The paper shows that, on sparse grids with a fixed number of islands, the phase separator drops from quadratic to linear complexity and the circuit depth depends only on the maximum node degree and QAOA layers. On an 89-bus benchmark, the reduced formulation fits into 154 qubits, within a 156-qubit hardware budget, while preserving the best cut value and producing feasible, power-validated islands. If correct, this provides a concrete route for running larger constrained optimization problems on near-term quantum processors.","feed_headline":"Compact QAOA cuts islanding qubit need; 89-bus grid fits 156 qubits","feed_subtitle":"Compact encoding plus classical repair runs 89-bus islanding in 154 qubits with optimal cuts.","key_machinery":"The load-bearing object is the encoding hierarchy E1/E2 combined with a slack-free Lagrangian constraint layer. E1 represents only K-1 island labels per bus and infers island K as the all-zero assignment, removing one-hot penalties; E2 additionally exploits coherent anchor groups to fix anchor-bus labels, so coherency constraints become structural and H_G vanishes. The Lagrangian layer evaluates minimum-size, generator-presence, and load-presence constraints on measured bitstrings, computes hinge violations, and updates classical multipliers by projected ascent, so no slack qubits enter the circuit. The cut Hamiltonian under E2 splits into constants, linear anchor-free edges, and quadratic free-free edges, which together produce the linear-complexity phase separator and shallow per-layer depth.","core_discovery":"The central claim is that the complete controlled-islanding problem can be embedded in a much smaller quantum register without losing any feasible partition or the optimum. Encoding E1 drops the redundant K-th island label, shrinking the register from K N to (K-1) N variables, and encoding E2 fixes the island label of every coherent anchor bus via Proposition 2.2, reducing the register to (K-1)(N-|A|) qubits and eliminating K! label-equivalent duplicates. Theorem A.1 states that this encoding hierarchy preserves the feasible solution space and the optimal cut. The paper then removes slack-qubit registers by evaluating minimum-size and generator/load constraints directly on measured samples through a projected Lagrangian update (Proposition 3.1), leaving no auxiliary qubits in the phase separator. For fixed K on sparse working graphs, the phase-separator complexity becomes O(E+F+N) with O(N) gates per layer and circuit depth O(p Delta_G), while the full one-hot baseline is O(E_0+$N_0^{2}$); this is what allows the 89-bus system to be executed on a 156-qubit backend.","pith_inferences":["Editorial: The anchor-fixing idea transfers directly to any seeded partition problem, such as graph clustering or facility grouping with fixed terminals, where each part must contain one designated seed; the same canonical-labeling argument would remove the factorial label symmetry.","Editorial: The feasibility claim is narrower than stated unless the classical repair map P is proven to handle every measured bitstring; a concrete test would be to feed P adversarial inputs such as the all-zeros and all-ones assignments on every benchmark and verify that the output partitions are connected and satisfy every island constraint.","Editorial: The linear-scaling result relies on the sparse-graph assumption E=O(N); on denser transmission topologies the O(E+F+N) term would grow with E, so the advertised linear per-layer gate count is a property of typical power grids, not of the formulation in general."],"forward_implications":["On sparse grids with fixed island count K, the QAOA phase separator contains O(E+F+N) nonconstant QUBO terms, giving O(N) gates per layer and O(p Delta_G) circuit depth instead of O(N^2) scaling.","The E2+Lagrangian formulation uses (K-1)(N-|A|) qubits, placing the 89-bus case at 154 qubits, inside a 156-qubit hardware limit, while the full one-hot formulation would require 321 qubits.","The best cut value is preserved across encodings and backends, and feasible-sample rates either improve or remain at parity in most benchmark cases; under the tested calibrated noise model, cut values stay unchanged and feasible rates drop by only a few percent.","Removing slack-qubit penalty blocks and fixing anchor labels flattens the QAOA cost landscape, reducing extreme gradient magnitudes and cost-range growth on larger systems, which the paper links to easier parameter optimization and improved trainability."],"supporting_citations":[{"why":"Supplies the cut-preserving graph-contraction step, the full one-hot baseline, and the classical repair map P used to turn measured bitstrings into feasible connected islands.","marker":"[19]"},{"why":"Defines QAOA and its alternating phase-separator and mixer ansatz, which the proposed formulation adapts with its compact Hamiltonian.","marker":"[11]"},{"why":"Establishes the slow-coherency anchor grouping that determines the target number of islands K and the anchor sets used by encoding E2.","marker":"[34]"},{"why":"Provides the slow-coherency modeling background for grouping generators into coherent clusters.","marker":"[7]"},{"why":"Supplies the calibrated device-noise model used to compare ideal, noisy-simulation, and hardware execution in the noise-resilience study.","marker":"[16]"}],"fun_headline_variants":["Qubit-efficient QAOA packs 89-bus islanding onto 156 qubits","Physics-constrained encoding cuts islanding qubit count for 89 buses","PACE-QAOA: linear-depth islanding on 156 qubits for 89 buses","Compact encoding fits 89-bus power islanding in 156 qubits","Islanding without slack: QAOA on 89-bus system fits 156 qubits"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The final feasibility guarantee rests on the classical repair routine always turning a measured bitstring into a partition that is connected and satisfies minimum island size and generator/load presence, and the paper supplies no proof that this routine cannot fail.","fun_headline_variants_meta":{"raw":{"variants":["Qubit-efficient QAOA packs 89-bus islanding onto 156 qubits","Physics-constrained encoding cuts islanding qubit count for 89 buses","PACE-QAOA: linear-depth islanding on 156 qubits for 89 buses","Compact encoding fits 89-bus power islanding in 156 qubits","Islanding without slack: QAOA on 89-bus system fits 156 qubits"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.00031,"raw_usage":{"total_tokens":1804,"prompt_tokens":1015,"completion_tokens":789,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":631,"completion_tokens_details":{"reasoning_tokens":678}},"tokens_in":631,"tokens_out":789,"duration_ms":7310,"temperature":1.0,"reasoning_tokens":678,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-15T14:59:53.375711+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Run the full pipeline on any benchmark system, log every raw measured bitstring together with the repaired partition, and check each repaired partition for exact DFS connectivity, minimum island size, and generator/load presence; a single failed sample disproves the claim that the framework consistently produces feasible islanding solutions.","supporting_citations":[{"cited_title":"REGRID-QAOA: A Resource-Efficient Hybrid QAOA Framework for Physics-Constrained Power System Islanding","cited_arxiv_id":"2606.15083","evidence_quote":"Supplies the cut-preserving graph-contraction step, the full one-hot baseline, and the classical repair map P used to turn measured bitstrings into feasible connected islands."},{"cited_title":null,"cited_arxiv_id":null,"evidence_quote":"Supplies the calibrated device-noise model used to compare ideal, noisy-simulation, and hardware execution in the noise-resilience study."}],"review_version":1}