{"id":"e61afc53-304c-47c1-88ce-74c53fdc497a","arxiv_id":"2608.02905","paper_version":1,"verdict":"CONDITIONAL","confidence":"MODERATE","novelty_score":4.0,"correctness_risk":"medium","formal_verification":"none","parameter_count":3,"one_line_summary":"A detector team reports working 16-channel readout of a 2.1-megapixel X-ray CCD at 6.7 frames per second with read noise below 3 electrons, plus sub-electron-noise SiSeRO sensors and AI-based background rejection.","lead":"This paper updates the development of fast, low-noise X-ray detector systems for future space telescopes, covering new readout chips, a 2.1-megapixel CCD, and single-electron-sensitive sensors. It also reports machine-learning methods that cut particle background by roughly half and improve the energy resolution of X-ray events.","discovery_kind":"extension","skeptic_critique":{"model":"deepseek-v4-flash","headline":"Mission-readiness claim rests on unmeasured 3.5 MHz/20 fps mode: CCID-100 noise is demonstrated only at 1–2 MHz, and the flight-like AXIS-TAP board is untested.","rationale":"The paper is a credible instrumentation status report: the measured 6.7 fps and <3 e− RMS at 1–2 MHz on the first four CCID-100 devices is genuine progress, and the MCRC's prior 5 Mpix/s/channel capability plus the SiSeRO RNDR result provide independent support for the component-level claims. The reader's weakest assumption correctly identifies the central gap: the conclusion's mission-readiness language depends on an extrapolation to the 3.5 MHz/20 fps operating point and on the untested AXIS-TAP flight board. My read does not change the reader's verdict; CONDITIONAL remains appropriate because the underlying architecture is plausible and partially demonstrated, but the specific readiness claim should be moderated until the 3.5 MHz noise measurement and the end-to-end flight-board test are reported. No fatal flaw is apparent, and no ad hominem is intended; the concern is about evidence scope, not ability or integrity.","tokens_in":12013,"tokens_out":3571,"duration_ms":31960,"concrete_test":"Operate a CCID-100 with the dual-MCRC board at a 3.5 MHz serial pixel rate and measure read noise from overscan or Fe-55 data on all 16 outputs; report the mean, channel-to-channel spread, and per-channel maximum. If the mean or any channel exceeds the mission requirement (e.g., 3 e− RMS), the 20 fps readiness claim is not supported. In parallel, connect the AXIS-TAP board to the same detector and verify that it produces a reconstructed image with equivalent noise at 3.5 MHz; if the board cannot sustain that rate or reproduces the noise, the flight electronics are not yet ready.","verdict_should_be":"UNCHANGED","load_bearing_attack":"Section 3 reports CCID-100 performance 'measured at 1 and 2 MHz serial pixel rate' with 'a frame rate of 6.7 frames/sec... average read noise of better than 3 e− RMS.' The mission-relevant mode, however, is 3.5 MHz serial rate at 20 fps (Sections 3 and 4). Read noise in CCD output stages generally increases with serial clock rate due to larger bandwidth and reduced settling time, so the <3 e− result at 1–2 MHz does not by itself establish the noise at 3.5 MHz. Section 4 describes the AXIS-TAP board as 'recently fabricated and populated' and 'now ready to port and scale' firmware, i.e., it has not yet produced a reconstructed image from a real CCID-100. The conclusion that these components 'are ready to go for a near-term Probe-class X-ray mission' requires both (a) read noise meeting the requirement at 3.5 MHz on the CCID-100 and (b) end-to-end operation of the flight-like 16-channel ADC/FPGA board with the MCRC. Neither is demonstrated in this manuscript; the companion SPIE papers may contain this information, but they are not part of the evidence presented here. This is an extrapolation over an unmeasured operating point and an untested board, not an internal inconsistency.","agreement_with_reader":"agree"},"referee_report":{"model":"deepseek-v4-flash","summary":"The paper reports on a multi-thrust technology program for future X-ray astronomy missions. It describes the MCRC readout ASIC for CCDs, the large-format 16-output CCID-100 CCD, flight-like camera electronics (AXIS-TAP), SiSeRO detectors with repetitive non-destructive readout (RNDR), and machine-learning-based event processing and background rejection. The principal demonstrated results are: (i) a 6.7 frames/s readout of the 2.1 Mpixel CCID-100 with average read noise better than 3 e- RMS at serial pixel rates of 1 and 2 MHz; (ii) a SiSeRO read noise of 0.40 e- RMS after 200 RNDR cycles (~320 us); (iii) a >40% reduction in cosmic-ray background from a two-stage ML algorithm evaluated on test data drawn from a different dataset than the training data; and (iv) an improvement in all-grade event reconstruction energy resolution from 131.9 eV to 108.2 eV using a 2D Gaussian charge-cloud fit. The conclusion asserts that these components and technologies are 'ready to go for a near-term Probe-class X-ray mission.'","tokens_in":12282,"tokens_out":5768,"duration_ms":50329,"significance":"If the reported results hold, the work is significant for next-generation X-ray instrumentation. The 16-output CCD readout at <3 e- RMS noise is a useful step toward high-frame-rate, low-noise focal planes; the SiSeRO sub-electron result is a strong demonstration of RNDR in an X-ray CCD; and the ML background-reduction result, evaluated on a separate test dataset, is a credible proof of concept. The paper also demonstrates system integration (MCRC-ASIC-to-FPGA imaging). However, the central 'mission readiness' claim extends beyond the evidence presented: the CCID-100 noise and frame-rate numbers are obtained at 1-2 MHz serial rates, the AXIS-TAP flight-like board has not yet produced a reconstructed image from a real detector, and the speed of the SiSeRO sub-electron measurement is not clearly tied to the >10 kpix/s claim. The significance of the manuscript as a standalone contribution is therefore somewhat lower than its conclusion suggests; the underlying results appear sound but need either additional measurements or more carefully qualified claims.","major_comments":[{"comment":"The mission-readiness claim in the conclusion rests on an extrapolation to an unmeasured operating point. Section 3 reports CCID-100 performance 'measured at 1 and 2 MHz serial pixel rate' and states 'A frame rate of 6.7 frames/sec has been achieved with an average read noise of better than 3 e- RMS.' The mission-relevant mode, however, is described in Section 4 as a 3.5 MHz serial clock at 20 frames per second. Read noise in CCD output stages generally increases with serial clock rate, so the <3 e- result at 1-2 MHz does not by itself establish the noise at 3.5 MHz. In addition, the AXIS-TAP board in Section 4 is described as 'recently fabricated and populated' and 'now ready to port and scale' firmware, i.e., it has not yet been tested with a CCID-100. The conclusion that these components 'are ready to go for a near-term Probe-class X-ray mission' therefore requires either (a) a demonstration at 3.5 MHz/20 fps or (b) a clearly stated qualification that this target remains to be verified. Please provide the missing data or temper the conclusion accordingly.","section":"Section 3 and Section 4"},{"comment":"The sub-electron RNDR result of 0.40 e- RMS after 200 cycles, stated as about 320 us, is presented without uncertainties, number of devices, or operating details. More importantly, the conclusion states that SiSeRO devices reach 'deep into the sub-electron regime at speeds >10kpix/s.' A 200-cycle average taking ~320 us corresponds to roughly 3.1 kpix/s per output if the averaging is performed serially on each pixel. Please clarify the pixel rate at which the 0.40 e- measurement was obtained, report the number of measurements and devices, and reconcile the stated >10kpix/s operating speed with the presented RNDR timing, or provide a separate measurement at that speed.","section":"Section 5, Figure 8"},{"comment":"The ML background-reduction claim 'over 40% reduction in the CR background' with 'X-ray signal loss to just 1-2%' is presented without statistical uncertainties, sample sizes, or a description of the test dataset size. The ROC curve in Figure 10 is the sole evidence, and the operating point at which the 40% reduction is achieved is not specified. Since this is a headline result in the conclusion, please report the number of test events, the confidence intervals on the background reduction and signal loss, and the exact threshold on the ROC curve used for the 40% figure.","section":"Section 6, Figure 10"}],"minor_comments":[{"comment":"Please state explicitly at which serial clock rate (1 MHz or 2 MHz) the 6.7 frames/s frame rate was achieved; the text reports measurements at 1 and 2 MHz but does not tie the frame-rate number to one of them.","section":"Section 3"},{"comment":"The Figure 6 caption labels the right panel as 'Dual MCRC CCID-100 readout board, with a nickel for scale,' but the text refers to 'the small image on the right side of Figure 6' as the reconstructed-image demonstration. The caption appears to be mismatched and should be corrected.","section":"Section 4, Figure 6 caption"},{"comment":"The phrase 'over 1.28 improvement in the signal-to-noise ratio' should read 'an improvement by a factor of 1.28' or 'a 28% improvement in signal-to-noise ratio.'","section":"Section 6"},{"comment":"There are several typographical errors: 'Massachusets' in the author affiliation, 'mulit-output' in the Section 2.2 heading, 'and and debugging' in Section 2.1, and 'with a mask with the groups logo' in Section 3. A careful proofreading pass is recommended.","section":"Throughout"}],"recommendation":"major_revision","confidential_remarks":"The manuscript reads as a progress report for a coordinated technology program, and many quantitative details are deferred to companion SPIE papers (e.g., Stueber et al. 2026, O'Neill et al. 2026, Juneau et al. 2026). As a standalone journal submission, the evidence is thin in places, and the 'ready to go for a Probe-class mission' claim is stronger than the in-paper data support. The authors should either add the missing measurements (3.5 MHz/20 fps, flight-board end-to-end test, SiSeRO speed-noise characterization) or explicitly frame the conclusion as a projection. Given the collaborative nature of the project, the companion papers will likely contain the needed detail; the revision should make this clear and avoid relying on 'not shown here' extrapolations for the central claim."},"author_rebuttal":null,"desk_editor":{"model":"deepseek-v4-flash","letter":"First thing to know: this is a credible program status report with real, directly measured results, but the closing 'ready to go for a Probe-class mission' sentence outruns the evidence. The 20 fps target is extrapolated from a 6.7 fps measurement, and the flight-like AXIS-TAP board has not yet produced a reconstructed image.\n\nWhat's new and good: first operation of the 16-channel CCID-100 readout with dual MCRC ASICs, including a reconstructed Ti K fluorescence image from a real detector; read noise better than 3 e- RMS at 6.7 fps at 1–2 MHz serial rates reported for the first four devices; the SiSeRO RNDR measurement reaching 0.40 e- RMS after 200 cycles; and the 2D Gaussian charge-cloud reconstruction that improves Mg K energy resolution from 131.9 to 108.2 eV. The ML background-reduction test uses test data sampled from a different dataset than training, which is a non-circular evaluation. These are genuinely useful numbers for the X-ray instrumentation community, and the self-citations point to companion SPIE papers that presumably carry the full characterization—appropriate for a status report.\n\nSoft spots, in proportional order. The mission-readiness claim rests on two extrapolations: CCD output noise generally increases with serial clock speed, and the requirement is 3.5 MHz/20 fps while the measured mode is 1–2 MHz/6.7 fps; the AXIS-TAP board is described as 'recently fabricated and populated' with firmware porting still ahead of it, so no end-to-end image exists yet. The paper also gives headline metrics without uncertainties or sample sizes—'better than 3 e- RMS', '0.40 e- RMS after 200 cycles'—which makes it hard to judge device-to-device spread. These are missing-detail issues, not internal contradictions, and the measurements are plausible and consistent.\n\nWho it's for: detector physicists, mission instrument teams, and anyone tracking TRL of X-ray CCD readout. It deserves serious peer review—the measured data should be on record. For revision, I'd ask for statistical context and a more careful readiness statement, but this isn't a desk reject.\n\nRecommendation: send to peer review with the expectation of moderate revision.","headline":"Solid measured results in an X-ray CCD readout status report, but the mission-readiness claim is extrapolation until 3.5 MHz/20 fps and the flight board are actually demonstrated.","tokens_in":13007,"tokens_out":2890,"would_cite":true,"duration_ms":23909,"reading_group":"maybe","serious_thinker":"yes","would_accept_peer_review":true},"rs_alignment":null,"lean_confirmation":null,"pith_extraction":{"msc":[],"pacs":["95.55.Ka"],"model":"deepseek-v4-flash","headline":"A 16-output CCD read by a custom ASIC reaches 6.7 frames per second with read noise below 3 electrons RMS, and the authors argue the full chain is ready for a near-term X-ray mission.","keywords":["X-ray CCD","readout ASIC","MCRC","CCID-100","SiSeRO","sub-electron noise","FPGA readout","machine learning event reconstruction"],"falsifier":"Run the CCID-100 through the full 16-channel MCRC chain at a 3.5 MHz serial rate and measure average read noise and frame rate: if 20 fps cannot be reached, or the average read noise exceeds about 3 electrons RMS, the readiness claim collapses; likewise, the claim fails if the AXIS-TAP board does not reproduce the prototype's waveform-to-event processing when connected to a live detector.","tokens_in":11819,"feed_emoji":"🔭","tokens_out":9311,"duration_ms":78418,"temperature":0.7,"pith_summary":"Next-generation X-ray observatories need detectors that read out quickly enough to avoid pile-up from bright sources and particle-background contamination in faint diffuse emission, while keeping read noise low for soft X-ray sensitivity. This paper reports a readout system built around a 2.1-megapixel CCD with 16 parallel outputs read by a custom ASIC, and states that the first four devices run at 6.7 frames per second with average read noise better than 3 electrons RMS. It also reports a SiSeRO output stage reaching 0.40 electrons RMS by averaging 200 non-destructive reads, plus machine-learning processing that reduces particle background and improves spectral resolution. If these results hold, the system would remove the frame-rate bottleneck that currently limits X-ray CCD cameras on future missions.","feed_headline":"16-output X-ray CCD runs 6.7 fps with under 3 electrons noise","feed_subtitle":"Custom ASIC readout plus sub-electron SiSeRO stages could meet near-term X-ray mission needs.","key_machinery":"The load-bearing mechanism is parallelization: a frame-transfer CCD with 16 short serial registers of 90 pixels each, read simultaneously by two eight-channel Multi-Channel Readout Chip (MCRC) ASICs, raises total pixel throughput without driving any single output node faster. At the output stage, SiSeRO (Single-electron Sensitive Read Out) uses a p-type buried-channel MOSFET over an internal gate, converting stored charge to drain-current modulation and permitting repeated non-destructive readout whose noise falls as $1/\\sqrt{N}$. The FPGA firmware computes pixel values from digitized waveforms, and a 2D Gaussian fit to the charge cloud recovers split X-ray events; the AXIS-TAP board packages 16 ADC channels with a space-qualifiable FPGA to make the chain flight-like.","core_discovery":"The paper's central claim is that a fully parallel detector-and-readout chain satisfies near-future X-ray mission requirements. A 16-output CCID-100 frame-transfer CCD, two MCRC-V1 ASICs on a dual-ASIC board, and an FPGA-based digitizer together deliver 6.7 frames per second with average read noise below 3 electrons RMS at 1–2 MHz serial rates, with 20 fps targeted at 3.5 MHz. The SiSeRO output stage achieves deep sub-electron noise, 0.40 electrons RMS after 200 repeated non-destructive read cycles, and the paper's event-processing methods cut particle background while improving energy resolution, from 131.9 eV to 108.2 eV on Mg K-alpha events. The conclusion is that these components are ready for a near-term Probe-class X-ray mission.","pith_inferences":["The paper leaves implicit that the same MCRC board, which supports both source-follower and drain readout, could read out JFET-output CCDs, SiSeRO CCDs, and other detector types, making it a reusable platform across missions.","If the 20 fps target at 3.5 MHz holds with read noise still near 3 electrons, the architecture would also enable time-domain X-ray observations, a capability beyond the stated pile-up and background goals.","The 2D Gaussian event reconstruction is a post-processing method and could be tested immediately on existing X-ray CCD datasets from current observatories, not just on the paper's Mg K-alpha example.","The 3x3 SiSeRO active-pixel proof of principle, if scaled, would combine CCD-grade spectral resolution with CMOS-style random access readout; that is a different detector trade space from the one this paper's CCD arrays occupy."],"forward_implications":["A near-term Probe-class X-ray camera can use this 16-output readout chain without waiting for a fundamentally new detector technology.","Bright-source observations will see far less pile-up, and faint diffuse emission will be less contaminated by particle background, broadening what a single telescope can measure.","Sub-electron SiSeRO readout at competitive speeds would extend soft X-ray sensitivity to lower energies and improve event grading for faint photons.","The modular dual-ASIC board can scale to larger focal planes, such as the 8-megapixel arrays the paper sketches, by adding readout channels.","The ML event-processing methods, if they survive flight validation, would shorten deep-survey exposure times; the paper quotes a factor over 1.65 for the WFI case."],"supporting_citations":[{"why":"Supplies the MCRC ASIC design and its measured speed and noise performance, the core of the readout chain.","marker":"[4]"},{"why":"Reports the characterization campaign of the first four CCID-100 devices that produced the 6.7 fps and <3 electron results.","marker":"[6]"},{"why":"Provides the noise and charge-transfer measurements supporting the CCID-100 performance claims.","marker":"[7]"},{"why":"Documents X-ray characterization of the large-format 16-channel sensors, grounding the mission-compatibility claim.","marker":"[8]"},{"why":"Demonstrates the FPGA readout chain from digitized CCD waveforms to reconstructed events, the proof-of-principle for the electronics.","marker":"[12]"},{"why":"Describes the AXIS-TAP flight-like board with 16 ADCs and space-ready FPGA that the readiness claim depends on.","marker":"[13]"},{"why":"Demonstrates repetitive non-destructive readout with SiSeRO devices, the mechanism behind the sub-electron result.","marker":"[15]"},{"why":"Reports the sub-electron noise performance in SiSeRO devices, supporting the deep-sub-electron claim.","marker":"[16]"}],"fun_headline_variants":["16-output CCD hits 6.7 fps with sub-3e- noise","Megapixel X-ray detector: 6.7 fps, <3 e- read noise","SiSeRO stage achieves 0.4 e- noise for X-ray detectors","Dual-ASIC readout enables 6.7 fps X-ray imaging","X-ray detector: 6.7 fps, <3 e- noise, Probe-class ready"],"cache_read_input_tokens":3200,"weakest_assumption_plain":"The mission-readiness claim rests on the assumption that read noise measured at 1–2 MHz serial rates will still meet requirements at the target 3.5 MHz rate, that the newly built but untested AXIS-TAP flight board will reproduce the prototype's behavior, and that the 0.40-electron repeated-readout result holds under practical flight-like operation.","fun_headline_variants_meta":{"raw":{"variants":["16-output CCD hits 6.7 fps with sub-3e- noise","Megapixel X-ray detector: 6.7 fps, <3 e- read noise","SiSeRO stage achieves 0.4 e- noise for X-ray detectors","Dual-ASIC readout enables 6.7 fps X-ray imaging","X-ray detector: 6.7 fps, <3 e- noise, Probe-class ready"]},"model":"deepseek-v4-flash","effort":"low","cost_usd":0.000564,"raw_usage":{"total_tokens":2653,"prompt_tokens":901,"completion_tokens":1752,"prompt_tokens_details":{"cached_tokens":384},"prompt_cache_hit_tokens":384,"prompt_cache_miss_tokens":517,"completion_tokens_details":{"reasoning_tokens":1640}},"tokens_in":517,"tokens_out":1752,"duration_ms":12098,"temperature":1.0,"reasoning_tokens":1640,"cache_read_input_tokens":384,"cache_creation_input_tokens":0},"cache_creation_input_tokens":0},"created_at":"2026-08-15T14:55:53.674842+00:00","model_set":{"reader":"deepseek-v4-flash"},"falsifier":"Run the CCID-100 through the full 16-channel MCRC chain at a 3.5 MHz serial rate and measure average read noise and frame rate: if 20 fps cannot be reached, or the average read noise exceeds about 3 electrons RMS, the readiness claim collapses; likewise, the claim fails if the AXIS-TAP board does not reproduce the prototype's waveform-to-event processing when connected to a live detector.","supporting_citations":[{"cited_title":"X-ray speed reading with the MCRC: a low noise CCD readout ASIC enabling readout speeds of 5 Mpixel/s/channel,","cited_arxiv_id":null,"evidence_quote":"Supplies the MCRC ASIC design and its measured speed and noise performance, the core of the readout chain."},{"cited_title":"High-speed, low-noise, multi- megapixel CCDs for next generation x-ray observatories,","cited_arxiv_id":null,"evidence_quote":"Reports the characterization campaign of the first four CCID-100 devices that produced the 6.7 fps and <3 electron results."},{"cited_title":"Noise and charge transfer characteristics of fast, low noise ccd sensors for axis,","cited_arxiv_id":null,"evidence_quote":"Provides the noise and charge-transfer measurements supporting the CCID-100 performance claims."},{"cited_title":"X-ray characterization of large-format, 16-channel CCD Sensors for future strategic X-ray missions,","cited_arxiv_id":null,"evidence_quote":"Documents X-ray characterization of the large-format 16-channel sensors, grounding the mission-compatibility claim."},{"cited_title":"The High-Speed FPGA Readout System for the Advanced X-ray Imaging Satellite (AXIS),","cited_arxiv_id":null,"evidence_quote":"Demonstrates the FPGA readout chain from digitized CCD waveforms to reconstructed events, the proof-of-principle for the electronics."},{"cited_title":"Advancing the AXIS camera front- end electronics architecture through the AXIS-TAP technology platform,","cited_arxiv_id":null,"evidence_quote":"Describes the AXIS-TAP flight-like board with 16 ADCs and space-ready FPGA that the readiness claim depends on."},{"cited_title":"Demonstrating repetitive non-destructive readout with SiSeRO devices,","cited_arxiv_id":null,"evidence_quote":"Demonstrates repetitive non-destructive readout with SiSeRO devices, the mechanism behind the sub-electron result."},{"cited_title":"Demonstrating sub-electron noise performance in single electron sensitive readout (SiSeRO) devices,","cited_arxiv_id":null,"evidence_quote":"Reports the sub-electron noise performance in SiSeRO devices, supporting the deep-sub-electron claim."}],"review_version":2}