A level-wise batch traversal algorithm for B+ trees implemented on FPGA with HLS achieves 4.9x speedup over single-threaded CPU and 2.1x over 16-threaded CPU for 1000-key batches on 1-million-entry trees of order 16.
A hybrid b+-tree as solution for in- memory indexing on CPU-GPU heterogeneous computing platforms
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Efficient Batch Search Algorithm for B+ Tree Index Structures with Level-Wise Traversal on FPGAs
A level-wise batch traversal algorithm for B+ trees implemented on FPGA with HLS achieves 4.9x speedup over single-threaded CPU and 2.1x over 16-threaded CPU for 1000-key batches on 1-million-entry trees of order 16.