{"as_of":"2026-08-15T04:01:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:a89478412107cce3052db96a33fc2e8c78a060f2b514a0b406cdd1bc70254472","coverage":[{"denominator":0,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":1,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":1,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-14T06:32:32.682623+00:00","state":"measured"},{"denominator":1,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":1,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-06T17:54:18.036608Z","state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"pith","source_observed_at":"2026-08-06T17:54:18.112305Z","state":"measured"}],"external_citation_measurements":[],"inbound":[{"citation":{"cited_paper":{"arxiv_id":"2405.02326","last_updated":"2024-12-02T01:59:30Z","snapshot_observed_at":"2026-08-13T00:23:30.804532Z","submitted_at":"2024-04-23T18:55:49Z","title":"Evaluating LLMs for Hardware Design and Test","version":2},"cited_work":{"arxiv_id":"2405.02326","doi":null,"metadata_source":"pith","pith_arxiv_id":"2405.02326","snapshot_observed_at":"2026-08-06T17:54:18.112305Z","title":"Evaluating LLMs for Hardware Design and Test","venue":"cs.AR","work_id":"91110629-0b65-4d2c-b89f-1381d1751112","year":2024},"citing_paper":{"arxiv_id":"2507.09660","last_updated":"2025-07-13T14:49:13Z","snapshot_observed_at":"2026-08-13T06:05:32.361748Z","submitted_at":"2025-07-13T14:49:13Z","title":"Tools and Methodologies for System-Level Design","version":1},"reference_index":92,"source":"pdf_text","source_observed_at":"2026-08-06T17:54:18.036608Z"},"links":{"cited_paper":"/paper/2405.02326","citing_paper":"/paper/2507.09660"},"observation_digest":"sha256:59bb5d32f8c43c24f571010562ae9392c4ce9cfbc94a6b69f7bcb35b0dbb0bd5","observation_id":"ea707bc4-f8a3-4ff0-92f6-25fcff3cd044","resolution":{"observed_at":"2026-08-06T17:54:18.118756Z","resolver_source":"local_arxiv","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}}],"links":{"evidence":"/evidence","html":"/paper/2405.02326/citation-record","integrity":"/paper/2405.02326/integrity","json":"/paper/2405.02326/citation-record.json","paper":"/paper/2405.02326"},"outbound":[],"paper":{"arxiv_id":"2405.02326","last_updated":"2024-12-02T01:59:30Z","latest_version":2,"primary_category":"cs.AR","snapshot_observed_at":"2026-08-13T00:23:30.804532Z","submitted_at":"2024-04-23T18:55:49Z","title":"Evaluating LLMs for Hardware Design and Test"},"reference_resolution":{"displayed":0,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":0,"verified_exact":0,"verified_fuzzy":0},"total_outbound_references":0},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"thesis":"As of 15 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 1 inbound Pith citation observation for arXiv:2405.02326."}