{"as_of":"2026-08-14T15:38:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:a3645e39203f3f38fe3751a9d8014e1591dcfb1c389e76a67de7042b8c841f9e","coverage":[{"denominator":0,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":2,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":2,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-14T06:32:32.682623+00:00","state":"measured"},{"denominator":2,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":2,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-12T11:50:51.965786Z","state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"arxiv_reference","source_observed_at":"2026-05-11T11:16:01.642805Z","state":"measured"}],"external_citation_measurements":[],"inbound":[{"citation":{"cited_paper":{"arxiv_id":"2411.01417","last_updated":"2024-11-03T03:02:23Z","snapshot_observed_at":"2026-08-14T12:16:31.867841Z","submitted_at":"2024-11-03T03:02:23Z","title":"BF-IMNA: A Bit Fluid In-Memory Neural Architecture for Neural Network Acceleration","version":1},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2411.01417","snapshot_observed_at":"2026-08-12T11:50:51.965786Z","title":"Bf-imna: A bit fluid in-memory neural architecture for neural network acceleration,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2411.17847","last_updated":"2024-11-26T20:00:54Z","snapshot_observed_at":"2026-08-13T00:49:51.922606Z","submitted_at":"2024-11-26T20:00:54Z","title":"SoftmAP: Software-Hardware Co-design for Integer-Only Softmax on Associative Processors","version":1},"reference_index":34,"source":"pdf_text","source_observed_at":"2026-08-12T11:50:51.965786Z"},"links":{"cited_paper":"/paper/2411.01417","citing_paper":"/paper/2411.17847"},"observation_digest":"sha256:aca724e54cc6f8ed79d3c2687bd1b5033d844e505c3b20b2fcab42fb78c9a899","observation_id":"e049b1dd-dc43-496a-b1d7-de96f186d843","resolution":{"observed_at":"2026-08-12T11:50:51.965786Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2411.01417","last_updated":"2024-11-03T03:02:23Z","snapshot_observed_at":"2026-08-14T12:16:31.867841Z","submitted_at":"2024-11-03T03:02:23Z","title":"BF-IMNA: A Bit Fluid In-Memory Neural Architecture for Neural Network Acceleration","version":1},"cited_work":{"arxiv_id":"2411.01417","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2411.01417","snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Bf-imna: A bit fluid in-memory neural architecture for neural network acceleration","venue":null,"work_id":"6f65d27f-347e-4caa-9a45-c9c2fbfcfdac","year":2024},"citing_paper":{"arxiv_id":"2604.11512","last_updated":"2026-04-13T14:16:20Z","snapshot_observed_at":"2026-08-11T04:15:11.435080Z","submitted_at":"2026-04-13T14:16:20Z","title":"EdgeCIM: A Hardware-Software Co-Design for CIM-Based Acceleration of Small Language Models","version":1},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-05-10T15:04:49.793158Z"},"links":{"cited_paper":"/paper/2411.01417","citing_paper":"/paper/2604.11512"},"observation_digest":"sha256:6c5f4d56d7e7422828d2ea0ad6a924d3d520cbb15f3730a21442d94b1e62f66c","observation_id":"9233e997-615c-400a-a4e5-ca48f1270391","resolution":{"observed_at":"2026-05-11T11:16:01.646721Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-14T06:32:32.682623+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"state":"measured"}}],"links":{"evidence":"/evidence","html":"/paper/2411.01417/citation-record","integrity":"/paper/2411.01417/integrity","json":"/paper/2411.01417/citation-record.json","paper":"/paper/2411.01417"},"outbound":[],"paper":{"arxiv_id":"2411.01417","last_updated":"2024-11-03T03:02:23Z","latest_version":1,"primary_category":"cs.AR","snapshot_observed_at":"2026-08-14T12:16:31.867841Z","submitted_at":"2024-11-03T03:02:23Z","title":"BF-IMNA: A Bit Fluid In-Memory Neural Architecture for Neural Network Acceleration"},"reference_resolution":{"displayed":0,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":0,"verified_exact":0,"verified_fuzzy":0},"total_outbound_references":0},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-14T06:32:32.682623+00:00","source":"crossref"},{"observed_at":"2026-08-14T06:32:18.44784+00:00","source":"retraction_watch"}],"thesis":"As of 14 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2411.01417."}