{"as_of":"2026-08-21T16:39:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:a4430e868d3492e066ee3c696c2e05701167f3aaf8ec7fa739abe6f48594dc37","coverage":[{"denominator":47,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":47,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-16T10:51:12.034045Z","state":"measured"},{"denominator":52,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":52,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-21T06:32:19.484+00:00","state":"measured"},{"denominator":5,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":5,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-06T22:55:09.370121Z","state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"arxiv_reference","source_observed_at":"2026-05-11T18:31:13.612838Z","state":"measured"}],"external_citation_measurements":[],"inbound":[{"citation":{"cited_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2504.17226","snapshot_observed_at":"2026-08-06T22:55:09.370121Z","title":"Flag: Formal and llm- assisted sva generation for formal specifications of on-chip communica- tion protocols,","venue":null,"work_id":null,"year":2025},"citing_paper":{"arxiv_id":"2506.20415","last_updated":"2025-06-25T13:31:13Z","snapshot_observed_at":"2026-08-17T07:20:36.298671Z","submitted_at":"2025-06-25T13:31:13Z","title":"SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models","version":1},"reference_index":76,"source":"pdf_text","source_observed_at":"2026-08-06T22:55:09.370121Z"},"links":{"cited_paper":"/paper/2504.17226","citing_paper":"/paper/2506.20415"},"observation_digest":"sha256:dd6f340630718d2f5fd4af33be7a331dba83ce16cd43eac7e09ed01ba0c7bdb2","observation_id":"aa4b6cb0-fa18-42a0-80e8-360fa55de017","resolution":{"observed_at":"2026-08-06T22:55:09.370121Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"cited_work":{"arxiv_id":"2504.17226","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2504.17226","snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Flag: Formal and llm-assisted sva generation for formal specifications of on-chip communication protocols","venue":null,"work_id":"dacdbb04-63e0-45ad-b5a1-12bfedddad15","year":2025},"citing_paper":{"arxiv_id":"2604.21715","last_updated":"2026-04-21T01:20:33Z","snapshot_observed_at":"2026-08-15T03:08:16.730236Z","submitted_at":"2026-04-21T01:20:33Z","title":"Automated LTL Specification Generation from Industrial Aerospace Requirements","version":1},"reference_index":34,"source":"pdf_text","source_observed_at":"2026-05-10T03:13:11.928039Z"},"links":{"cited_paper":"/paper/2504.17226","citing_paper":"/paper/2604.21715"},"observation_digest":"sha256:067844c95e72e3db9f2b6be47ea4d0d72b726f799db79e953982b1c32668cb8d","observation_id":"53b3ce17-5f41-4a04-a7b4-0006de14dfd0","resolution":{"observed_at":"2026-05-10T03:14:07.856321Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"cited_work":{"arxiv_id":"2504.17226","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2504.17226","snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Flag: Formal and llm-assisted sva generation for formal specifications of on-chip communication protocols","venue":null,"work_id":"dacdbb04-63e0-45ad-b5a1-12bfedddad15","year":2025},"citing_paper":{"arxiv_id":"2605.00058","last_updated":"2026-04-30T02:01:48Z","snapshot_observed_at":"2026-08-17T13:59:57.395377Z","submitted_at":"2026-04-30T02:01:48Z","title":"Autoformalizing Memory Specifications with Agents","version":1},"reference_index":37,"source":"arxiv_source","source_observed_at":"2026-05-09T20:43:27.934095Z"},"links":{"cited_paper":"/paper/2504.17226","citing_paper":"/paper/2605.00058"},"observation_digest":"sha256:762114f6203aa573112f87da1b5ed1354f0f5fadbdd6d91ca5cdfd2115625e3a","observation_id":"0ac62f0d-55ed-45b8-8d77-35d1039b3a5a","resolution":{"observed_at":"2026-05-11T15:01:06.440287Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"cited_work":{"arxiv_id":"2504.17226","doi":null,"metadata_source":"arxiv_reference","pith_arxiv_id":"2504.17226","snapshot_observed_at":"2026-06-05T21:23:00.469572Z","title":"Flag: Formal and llm-assisted sva generation for formal specifications of on-chip communication protocols","venue":null,"work_id":"dacdbb04-63e0-45ad-b5a1-12bfedddad15","year":2025},"citing_paper":{"arxiv_id":"2605.04704","last_updated":"2026-05-07T07:47:54Z","snapshot_observed_at":"2026-08-15T00:17:51.480431Z","submitted_at":"2026-05-06T09:55:36Z","title":"UVMarvel: an Automated LLM-aided UVM Machine for Subsystem-level RTL Verification","version":2},"reference_index":36,"source":"pdf_text","source_observed_at":"2026-05-08T15:36:38.153161Z"},"links":{"cited_paper":"/paper/2504.17226","citing_paper":"/paper/2605.04704"},"observation_digest":"sha256:78ee05e10d6323a8f52ee00c6a4788f235071c8fa6e427dd0b589e99a308d357","observation_id":"67825b71-ba5a-4694-9a55-4e2d362c26e0","resolution":{"observed_at":"2026-05-11T18:31:13.617512Z","resolver_source":"arxiv_id","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2504.17226","snapshot_observed_at":"2026-08-01T01:40:57.849628Z","title":null,"venue":null,"work_id":null,"year":2025},"citing_paper":{"arxiv_id":"2607.27776","last_updated":"2026-07-30T07:08:49Z","snapshot_observed_at":"2026-08-18T20:57:51.211260Z","submitted_at":"2026-07-30T07:08:49Z","title":"CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation","version":1},"reference_index":28,"source":"pdf_text","source_observed_at":"2026-08-01T01:40:57.849628Z"},"links":{"cited_paper":"/paper/2504.17226","citing_paper":"/paper/2607.27776"},"observation_digest":"sha256:3426c497f21a0b02e7c4a3c21576f880b3934ce85df5411f1f8e207c62de8a5f","observation_id":"4b7b053e-0cfa-4452-8f59-ec94ff23be2f","resolution":{"observed_at":"2026-08-01T01:40:57.849628Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}}],"links":{"evidence":"/evidence","html":"/paper/2504.17226/citation-record","integrity":"/paper/2504.17226/integrity","json":"/paper/2504.17226/citation-record.json","paper":"/paper/2504.17226"},"outbound":[{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:14.154309Z","title":"[Online]","venue":null,"work_id":"9d5b0da2-1b97-48b8-8d47-edb195e4c263","year":2004},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":1,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.545373Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:7141c926a23f6ee21cf1c84e6b9b74160f4b5f9ba1badb6c773da75144083af7","observation_id":"384d00cb-2079-4c56-99dc-eda67f5b8339","resolution":{"observed_at":"2026-08-16T10:51:14.161851Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:14.117353Z","title":"[Online]","venue":null,"work_id":"c6a277d3-dfde-4cd1-b54a-b1d4eb0cb78b","year":2002},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":2,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.558851Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:e5dfff61e1f52ddc7b5f8bfb680928f06ffadeb7d49eed5e6660eb1b1225bcf3","observation_id":"68f666fe-4c35-423b-af91-506aae37bf28","resolution":{"observed_at":"2026-08-16T10:51:14.128513Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:14.065206Z","title":"[Online]","venue":null,"work_id":"37d9d7b8-9b16-4eb5-8720-2b5d94836a90","year":1998},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":3,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.568566Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:d154a772027e08cfe51570eef54b7db76ed5a13c866bff2fc60eec1232135aac","observation_id":"93b800b7-7c54-4b9a-aa44-1649ac6c0fd9","resolution":{"observed_at":"2026-08-16T10:51:14.079147Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:14.005681Z","title":"Using formal techniques to debug the amba system-on-chip bus protocol,","venue":null,"work_id":"e7f6a70a-1f88-4e51-ade9-d347bed6c849","year":2003},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":4,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.575666Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:21a1bb641c8b026b260ba8e0fbfec750dc0d1998860900cb24968df3eeddcee8","observation_id":"8fcdb6b9-7a66-4ba8-a8fc-75e8ec0860d1","resolution":{"observed_at":"2026-08-16T10:51:14.023117Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.955729Z","title":"Amba ahb bus potocol checker with efficient debugging mechanism,","venue":null,"work_id":"8c0567fa-52c2-482d-91a7-90717deb1ff3","year":2008},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":5,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.583498Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:268afef725596052b92924b83f807fb8afd990bb6868eb2751e5e4367a5e4726","observation_id":"ce3ed148-7f9f-412b-b2b4-2ec5037623bd","resolution":{"observed_at":"2026-08-16T10:51:13.970613Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.910111Z","title":"A synthesizable axi protocol checker for soc integration,","venue":null,"work_id":"8b532e93-7ebc-4ce3-b9b4-7e2fa89c9ddc","year":2010},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.606475Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:d1e76a667fa287c87ba7de82116dc0b9d14c6c8ccebdbd5d8b4c13c3c2bc9ac2","observation_id":"b4b1d8c5-9abb-44f4-b007-40090c7d6f0e","resolution":{"observed_at":"2026-08-16T10:51:13.925908Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.881467Z","title":"[Online]","venue":null,"work_id":"6016e2f6-2718-4473-a5fb-3e034bb96c3a","year":2009},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":7,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.619081Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:cfbeb652c609d08593dd4558509f7a289e2297526463ed3a2fc03d7310cbc6d5","observation_id":"c1f74cd6-adef-41df-a5c1-335c683e0d96","resolution":{"observed_at":"2026-08-16T10:51:13.889676Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.628431Z","title":"Ieee standard for systemverilog–unified hardware design, specification, and verification language,","venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":8,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.628431Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:3af9f68849300e6c575cac0791d49a76b453e4ca222e177c726b1a88109ef606","observation_id":"94ddfc92-1e12-4f25-9507-a3b335242a43","resolution":{"observed_at":"2026-08-16T10:51:11.628431Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.654502Z","title":"A survey on assertion- based hardware verification,","venue":null,"work_id":null,"year":2022},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":9,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.654502Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:551bcb4143df8f1eb6c9cceed01b9daa20004c4087883585279f6467c17c3759","observation_id":"a2405e93-3af0-4c39-b82b-cf15e6017cc6","resolution":{"observed_at":"2026-08-16T10:51:11.654502Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.783030Z","title":"Automatic hardware synthesis from specifications: A case study,","venue":null,"work_id":"2a999bdf-3ba5-409e-afc4-6b21288d8699","year":2007},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":10,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.667786Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:e1a6e652f09c37b70a308adba52860f545d4662c9efa0e80c433c68953cef6c8","observation_id":"4d25bf76-24e6-441a-acc7-e1fb6aadf7fb","resolution":{"observed_at":"2026-08-16T10:51:13.795040Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.748160Z","title":"Synthesis of amba ahb from formal specification: a case study,","venue":null,"work_id":"28392c90-42dc-41cf-b5c8-e831fbf0bbc4","year":2013},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.679384Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:043b131ca442da9f18543e6ba98c7aa063feebb342e48ba8b90ddd4035b7a19d","observation_id":"9dcb2590-4b1d-4c45-a180-0d3724e78355","resolution":{"observed_at":"2026-08-16T10:51:13.759202Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.702895Z","title":"Spectosva: Circuit specification document to systemverilog assertion translation,","venue":null,"work_id":"593cc9b4-a239-440a-ae20-810e9c9db743","year":2021},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.685609Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:b7184a50bf0bd0228e1d561cf5c27340d26749e638a57ec6c6c9a5b9e5473b4d","observation_id":"8273c9c6-f71b-4472-bac5-63c568d737f9","resolution":{"observed_at":"2026-08-16T10:51:13.713635Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.693437Z","title":"Chiraag: Chatgpt informed rapid and automated assertion generation,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":13,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.693437Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:d394a920c2ad1b5aa587124eb4616cfb641d7fee2e383ab76c7957f10e686e92","observation_id":"2bc17fc4-d7e2-4ea3-8ada-350244d00531","resolution":{"observed_at":"2026-08-16T10:51:11.693437Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.708012Z","title":"Assertllm: Generating hardware verification assertions from design specifications via multi-llms,","venue":null,"work_id":null,"year":2025},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":14,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.708012Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:63ebac9d98ebafa00ca853f53d3543d1398efd14e88b358b0f77816a129c72c4","observation_id":"584a8e37-cb58-4b93-87e5-f896905c78c1","resolution":{"observed_at":"2026-08-16T10:51:11.708012Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.718522Z","title":"Chatbot-based assertion generation from natural language specifications,","venue":null,"work_id":null,"year":2019},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":15,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.718522Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:b93ad897597be2cb4786ae4921f5afd2a8bc1d0205fbbac969c7668f55ab0760","observation_id":"036a2c3e-9f05-4769-8b74-b0d40e09d05e","resolution":{"observed_at":"2026-08-16T10:51:11.718522Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.372393Z","title":"Hybrid rule-based and machine learning system for assertion generation from natural language specifications,","venue":null,"work_id":"839f23f9-8547-412e-9b6d-3137efa82e54","year":2022},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":16,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.731399Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:e1e5bde61afa77385a0de35f66987e4b0b0b8fd9615920d7434958dc0d4b5953","observation_id":"a9747cea-1b40-4f35-b091-ee1bda5edb79","resolution":{"observed_at":"2026-08-16T10:51:13.383178Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.338574Z","title":"[Online]","venue":null,"work_id":"8e9f226e-d43d-48b9-a6cc-7f837155abd2","year":2021},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":17,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.736864Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:05991cc972dd88d4d33855851b9de90d50000cd7a800108347e68fc202d16dde","observation_id":"4bb3f418-a910-44b7-87bf-4207721c3f53","resolution":{"observed_at":"2026-08-16T10:51:13.348398Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.288671Z","title":"[Online]","venue":null,"work_id":"467c37ed-f9a8-4515-89a8-b070615650f6","year":2021},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":18,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.744737Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:f6d38b0b565edd542ed02cd06e974792543b09025e971de42927bb2f009ab1f0","observation_id":"fbd6ef08-b90a-49e8-a382-edadd4e11b8a","resolution":{"observed_at":"2026-08-16T10:51:13.297911Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.255909Z","title":"Z3: An efficient smt solver,","venue":null,"work_id":"0d1cbc83-5ec6-4257-8d15-3b4740850e5f","year":2008},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":19,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.759566Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:afb5e67b014ef5e7c0c0662726d1475ac32dce3b259dd5ae21cd53532ecf28c9","observation_id":"093fc965-1a99-4457-9e0e-9be797b03ce4","resolution":{"observed_at":"2026-08-16T10:51:13.266133Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2412.16720","last_updated":"2026-04-30T02:46:40Z","snapshot_observed_at":"2026-08-19T11:46:55.171293Z","submitted_at":"2024-12-21T18:04:31Z","title":"OpenAI o1 System Card","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2412.16720","snapshot_observed_at":"2026-08-16T10:51:11.773105Z","title":"Openai o1 system card,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":20,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.773105Z"},"links":{"cited_paper":"/paper/2412.16720","citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:64fcc348c9d7a31f1b983bd36b1c18e460160580b7defabf5f1f5a0dc634b517","observation_id":"e010b4fb-a507-48fc-a9bd-0cbbafd183c1","resolution":{"observed_at":"2026-08-16T10:51:11.773105Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2410.21276","last_updated":"2024-10-25T17:43:01Z","snapshot_observed_at":"2026-08-15T14:02:47.366139Z","submitted_at":"2024-10-25T17:43:01Z","title":"GPT-4o System Card","version":1},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2410.21276","snapshot_observed_at":"2026-08-16T10:51:11.780919Z","title":"Gpt-4o system card,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":21,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.780919Z"},"links":{"cited_paper":"/paper/2410.21276","citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:2bb9e074d2ae053bfc1b579adcb7bff44540c23545696760fe7e9aabe69f320a","observation_id":"bcfcfa03-26bc-43f4-8f32-31ca5315cf61","resolution":{"observed_at":"2026-08-16T10:51:11.780919Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.197321Z","title":"Automating the translation of assertions using natural language pro- cessing techniques,","venue":null,"work_id":"5bed1db6-2b06-400e-91bc-5e1da0aa6ea6","year":2014},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":22,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.788691Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:158d6e50e7b16f8121498ae11cbc596cbc1286e23caa64c2a86363497b7002e6","observation_id":"fa890d09-8172-451b-99d1-1c6ec4ada179","resolution":{"observed_at":"2026-08-16T10:51:13.215397Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.152536Z","title":"Arsenal: automatic requirements specification extraction from natural language,","venue":null,"work_id":"0283ce68-cbb8-4970-bc7b-d6ddfa81ff65","year":2016},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":23,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.796287Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:d8467727e3e5bd75dca0a44f43ff95b7f85c65aae83879631466f566ba9ccaa4","observation_id":"d4b9cc5e-011b-4b38-8230-b9e2ac964521","resolution":{"observed_at":"2026-08-16T10:51:13.165045Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.092540Z","title":"Capturing assertions from natural language descriptions,","venue":null,"work_id":"780aa882-7588-47f6-8c4c-e8e7f500e4ff","year":2013},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":24,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.807707Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:9cb131aac398aab97cdc5884fb6e0afbbf9d7b23e7349ba7776e9fa60893773f","observation_id":"a1a6bac4-69f2-41bd-9254-1e7420782e3f","resolution":{"observed_at":"2026-08-16T10:51:13.107998Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.047171Z","title":"Generating formal hardware verification properties from natural language documentation,","venue":null,"work_id":"de6b8796-574f-41f9-ba64-9684666d5b49","year":2015},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":25,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.823944Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:5c0d75b7935becad62ff10db73dc84c8c5abb5a74cf083f8991f87a062d565e4","observation_id":"d2b6410b-2fbc-4275-9efa-91237c1009e5","resolution":{"observed_at":"2026-08-16T10:51:13.059089Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:13.013630Z","title":"Glast: Learning formal grammars to translate natural language specifications into hardware assertions,","venue":null,"work_id":"7be616ee-63b3-4bbb-919f-4e44d17d5b5e","year":2016},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":26,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.834512Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:c701f77ee90a2748412bd18c17637d8504773b1ef3d31989e2b5d0ee1e5b37f6","observation_id":"27084dc4-0c30-47b6-8f23-7dc51367bc31","resolution":{"observed_at":"2026-08-16T10:51:13.023028Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.976684Z","title":"Controlled natural language frame- work for generating assertions from hardware specifications,","venue":null,"work_id":"bc71b351-4594-462d-bdee-369898ba0076","year":2019},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":27,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.842599Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:96d5e9838d5d83c579648b910f6f0e22a8586129547b5a9fc270d493560b767e","observation_id":"5e0a7c5c-7bf5-47c4-b5a6-a2f7c533dfea","resolution":{"observed_at":"2026-08-16T10:51:12.989980Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.947235Z","title":"Automatic assertion generation from natural language specifications using subtree analysis,","venue":null,"work_id":"87675a1e-ab6d-4427-9789-54881d299d21","year":2019},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":28,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.849053Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:67208d4c81d43fa1846938c4784d4e47adaf1bfa0738528e368567500d74eaaa","observation_id":"1120680e-85ea-4988-9564-15f42ff1af59","resolution":{"observed_at":"2026-08-16T10:51:12.957597Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.908091Z","title":"Ease: Enabling hardware assertion synthesis from english,","venue":null,"work_id":"71c08f78-4348-45a3-a6c1-b2aa682e548a","year":2019},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":29,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.862584Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:8474963a8ef3e4cd671dcd1db47c980f3097d2fffac225a3bbb6b73d1a71dc48","observation_id":"495bc61a-a708-4b5b-8c27-09e107bace80","resolution":{"observed_at":"2026-08-16T10:51:12.919179Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.869349Z","title":"Automated assertion generation from natural language specifications,","venue":null,"work_id":null,"year":2020},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":30,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.869349Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:753e73fb86aa65db48ad75c73e48e74f25249322b35935e0b378489c583c6e20","observation_id":"671df87b-56ca-4a62-ab85-37503a591715","resolution":{"observed_at":"2026-08-16T10:51:11.869349Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.841312Z","title":"nl2spec: Interactively translating unstructured natural language to temporal logics with large language models,","venue":null,"work_id":"1001f270-9b18-4864-9d1d-be3adee7ddda","year":2023},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":31,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.876676Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:d6b9f4e8e4043a447cb8f541a187d4852a01c66455166ad46b65e4070a92e74b","observation_id":"9ab57a17-add7-49c0-9792-80e8ac23f647","resolution":{"observed_at":"2026-08-16T10:51:12.852608Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.793921Z","title":"Towards improving verification pro- ductivity with circuit-aware translation of natural language to systemver- ilog assertions,","venue":null,"work_id":"78ec6741-2dc4-4003-96cf-3764ebf55b89","year":2023},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":32,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.887507Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:6e0fc8779e01d51f30262fe13cae8ce3758c9d4ae52995b8b3877e13ef62f14e","observation_id":"11e1007b-0512-4caf-92e6-3558665ac864","resolution":{"observed_at":"2026-08-16T10:51:12.804106Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.748379Z","title":"Llm-assisted generation of hardware assertions,","venue":null,"work_id":"ac36fa88-bfb8-4abe-a26b-b82b6284073e","year":2023},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":33,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.898634Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:434f750f40ca18c6c78ae1c2ba42332c9e2c94ab0a29cbed9d21f5cd2a0a8ec1","observation_id":"ca079058-08e5-4121-b29b-361c96e374b3","resolution":{"observed_at":"2026-08-16T10:51:12.770889Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.909132Z","title":"Domain- adapted llms for vlsi design and verification: A case study on formal verification,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":34,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.909132Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:32870cf143e18b1a7e30f27d209193b44920e3090e55c272e7c9cc920efd7c6d","observation_id":"7ab5404e-3fc3-4afc-90eb-5b1154ac8a94","resolution":{"observed_at":"2026-08-16T10:51:11.909132Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.671930Z","title":"Enhanced vlsi assertion generation: Conforming to high-level specifica- tions and reducing llm hallucinations with rag,","venue":null,"work_id":"e5668f8d-2a1b-4a35-843f-a55d80e4f336","year":2024},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":35,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.919578Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:c45f72e583aa4d1cbababd35ecdbc6c8c64dcc31480b4c7fe9870214e05b1b23","observation_id":"768a09e6-bbeb-402e-b3f1-6ac1b7d655ae","resolution":{"observed_at":"2026-08-16T10:51:12.684092Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.626508Z","title":"Scalable specification mining for verification and diagnosis,","venue":null,"work_id":"392e21ec-6dae-4851-b519-0ea2b4e0c62a","year":2010},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":36,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.925362Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:11b43fa0303259df2cfa87faf1807427f47ebb4302739c6b0bc4eda1aee85df7","observation_id":"c8efbc39-64b8-4361-a392-eeb5b27e0ab3","resolution":{"observed_at":"2026-08-16T10:51:12.639863Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.931559Z","title":"Goldmine: Automatic assertion generation using data mining and static analysis,","venue":null,"work_id":null,"year":2010},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":37,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.931559Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:43373afda61326eb8069113207a120a724166dd867834abd80b98eb09234501e","observation_id":"29be8a38-748c-4dab-a7da-53d3f6e98948","resolution":{"observed_at":"2026-08-16T10:51:11.931559Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.942535Z","title":"Automatic genera- tion of assertions from system level design using data mining,","venue":null,"work_id":null,"year":2011},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":38,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.942535Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:a981982fb84e41a57a1c148d7379424605d03c87bc6300c5d3c493cadc56ac76","observation_id":"b8d31111-d4c1-4a0f-a6cf-efcdecffec41","resolution":{"observed_at":"2026-08-16T10:51:11.942535Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.956309Z","title":"Word level feature discovery to enhance quality of assertion mining,","venue":null,"work_id":null,"year":2012},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":39,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.956309Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:b5125b51c0219c4448b99a82ca2b333447d48578a07cd5c33a5b0aa6039cb002","observation_id":"7dd00058-4ca9-4f58-823e-a16134f0d964","resolution":{"observed_at":"2026-08-16T10:51:11.956309Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.509267Z","title":"Mining hardware assertions with guidance from static analysis,","venue":null,"work_id":"07424d41-93bf-45df-9ddb-5521eac3748e","year":2013},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":40,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.966366Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:e1fd8c9332d16d5903c678f142d135a151a5f723e12073ead33f4aa4bff7a66c","observation_id":"ddd006c8-6ce0-4002-a6ef-d80ed3981dca","resolution":{"observed_at":"2026-08-16T10:51:12.516107Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.451460Z","title":"A coverage guided mining approach for automatic generation of succinct assertions,","venue":null,"work_id":"a652877b-0bf5-4455-b060-3b42f3f401db","year":2014},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":41,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.979863Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:bd1417f6a06f3a40ae27f4f4252a521dee3808fd70110d66226ef11e383d123f","observation_id":"762f9210-0c61-4934-bdf2-1f79cff9f4c4","resolution":{"observed_at":"2026-08-16T10:51:12.480931Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.412981Z","title":"A-team: Automatic template- based assertion miner,","venue":null,"work_id":"a496a67c-a7b5-4ae3-8332-61b10ad5e137","year":2017},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":42,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.991765Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:a7fd47b315112ce471ae9ab94fa3de8edf5f8d26d228e03a81c6970c1ab5ed1c","observation_id":"46ee9c25-d283-40a7-83e5-6b34df2d64e1","resolution":{"observed_at":"2026-08-16T10:51:12.424270Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:11.999830Z","title":"Harm: a hint-based assertion miner,","venue":null,"work_id":null,"year":2022},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":43,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:11.999830Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:c265dec705468dd1e71b8c80c7ae768478632a295babe003d4a8c892e6577dbe","observation_id":"cf4c9baa-bb58-43ee-9f3f-9db35655975f","resolution":{"observed_at":"2026-08-16T10:51:11.999830Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.336356Z","title":"Rtlcheck: Verifying the memory consistency of rtl designs,","venue":null,"work_id":"bb01f733-25dc-438f-bddd-e63226042b4f","year":2017},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":44,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:12.010332Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:9b80c95451f7ee8fd5de7b73843de88b05c31341c3bbee705ea6ad6311ed7f03","observation_id":"3c4ce3ea-2ae2-4b0e-91d2-17c926fa927f","resolution":{"observed_at":"2026-08-16T10:51:12.362108Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-21T06:32:19.484+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-16T10:51:12.017533Z","title":"Au- tosva: Democratizing formal verification of rtl module interactions,","venue":null,"work_id":null,"year":2021},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":45,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:12.017533Z"},"links":{"citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:25ef23106f66679a3a2ff18b1700ca4c69e78f64b2288fa2ca1a642e982755a2","observation_id":"25dbc771-61b5-4b64-b1f3-042c6d363580","resolution":{"observed_at":"2026-08-16T10:51:12.017533Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2309.09437","last_updated":"2023-09-28T15:27:39Z","snapshot_observed_at":"2026-08-19T21:26:31.649435Z","submitted_at":"2023-09-18T02:37:43Z","title":"Using LLMs to Facilitate Formal Verification of RTL","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2309.09437","snapshot_observed_at":"2026-08-16T10:51:12.023579Z","title":"Using llms to facilitate formal verification of rtl,","venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":46,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:12.023579Z"},"links":{"cited_paper":"/paper/2309.09437","citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:50b265aae2dfbce9ba5233809a062e88b4bcea9ee1d2da588bb7a7981158e783","observation_id":"b75996c4-9fed-4425-808d-2c65aa721fab","resolution":{"observed_at":"2026-08-16T10:51:12.023579Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":{"arxiv_id":"2406.18627","last_updated":"2025-02-28T00:54:32Z","snapshot_observed_at":"2026-08-20T08:46:48.440429Z","submitted_at":"2024-06-26T14:47:28Z","title":"AssertionBench: A Benchmark to Evaluate Large-Language Models for Assertion Generation","version":2},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2406.18627","snapshot_observed_at":"2026-08-16T10:51:12.034045Z","title":"Assertionbench: A benchmark to evaluate large-language models for assertion generation,","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols","version":1},"reference_index":47,"source":"pdf_text","source_observed_at":"2026-08-16T10:51:12.034045Z"},"links":{"cited_paper":"/paper/2406.18627","citing_paper":"/paper/2504.17226"},"observation_digest":"sha256:aaf8c950f5bc4d51f4048654f5278f3152bbbca145f2d310c235c6fe221f2ad6","observation_id":"610c9323-c6d8-476a-b83b-e4953aff09ff","resolution":{"observed_at":"2026-08-16T10:51:12.034045Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}}],"paper":{"arxiv_id":"2504.17226","last_updated":"2025-04-24T03:34:37Z","latest_version":1,"primary_category":"cs.AR","snapshot_observed_at":"2026-08-20T08:45:20.453004Z","submitted_at":"2025-04-24T03:34:37Z","title":"FLAG: Formal and LLM-assisted SVA Generation for Formal Specifications of On-Chip Communication Protocols"},"reference_resolution":{"displayed":47,"state_counts":{"malformed_identifier":0,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":16,"verified_exact":0,"verified_fuzzy":31},"total_outbound_references":47},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-21T06:32:19.484+00:00","source":"crossref"},{"observed_at":"2026-08-21T06:32:16.066871+00:00","source":"retraction_watch"}],"thesis":"As of 21 August 2026, this Paper Citation Record lists 47 of 47 outbound references and 5 inbound Pith citation observations for arXiv:2504.17226."}