{"as_of":"2026-08-13T14:18:00Z","caps":{"database_statements":6,"inbound":100,"outbound":100},"context_digest":"sha256:42c097d648c9097ba12b9a1e0a81bf701413104698235b5874451776da212b04","coverage":[{"denominator":49,"lane":"reference_resolution","note":"Typed states for the displayed outbound observations.","records_observed":49,"source":"paper_references, paper_reference_links","source_observed_at":"2026-08-07T13:15:54.540098Z","state":"measured"},{"denominator":49,"lane":"standing_notices","note":"One-hop event checks from named stored sources.","records_observed":49,"source":"scholarly_work_events, retraction_status_cache","source_observed_at":"2026-08-13T06:32:02.005865+00:00","state":"measured"},{"denominator":0,"lane":"inbound_itemization","note":"Pith citing papers itemized under the disclosed page cap.","records_observed":0,"source":"paper_references, paper_reference_links","source_observed_at":null,"state":"measured"},{"denominator":1,"lane":"external_citation_measurements","note":"A source-named dated measurement, never combined with another source.","records_observed":0,"source":"cited_works","source_observed_at":null,"state":"measured"}],"external_citation_measurements":[],"inbound":[],"links":{"evidence":"/evidence","html":"/paper/2505.22390/citation-record","integrity":"/paper/2505.22390/integrity","json":"/paper/2505.22390/citation-record.json","paper":"/paper/2505.22390"},"outbound":[{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:58.505041Z","title":null,"venue":null,"work_id":"d9bbab77-31b8-46f5-9875-bfeeb75f3d13","year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":1,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:36.998741Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:7266b95d38d0c8b7bb44c80662f7affb6fdcaefb84f46cb49ffe67002e12d8ab","observation_id":"edd2956a-d43c-4ac9-a10e-3ed4121a3991","resolution":{"observed_at":"2026-08-07T13:15:58.557390Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:58.373954Z","title":null,"venue":null,"work_id":"444262c9-1aef-4548-b2c8-80980ec59bb3","year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":2,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:37.112283Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:cc84170a394fac3041a62e28469a3b471705086cd599cadbe1407746b6aa167e","observation_id":"9700b87c-7117-43ae-8b46-c081a2a37dd7","resolution":{"observed_at":"2026-08-07T13:15:58.446981Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:58.245592Z","title":null,"venue":null,"work_id":"579c983d-7401-46c7-b5e2-ac9eb0e59ea1","year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":3,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:37.287736Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:bd5f99c7c4c539f59823c773443d98fa8793663d54dcb9e7b15fd25740e3b895","observation_id":"5317ab8d-3963-4b45-a691-727b3c7f4235","resolution":{"observed_at":"2026-08-07T13:15:58.292720Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:58.125840Z","title":null,"venue":null,"work_id":"ea133cda-ed74-43f4-963e-4be7dfd438b6","year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":4,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:37.462365Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:9818ee052888dde327a007177a2cbc708ce6b2b1a460c50d0a4175c07742a488","observation_id":"9bd4b734-45db-4498-8e97-5f13628cbc58","resolution":{"observed_at":"2026-08-07T13:15:58.168398Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:58.010429Z","title":"The sampling distribution is given by 2 −2n3∣Oi∣, where ∣Oi∣ is the weight of Oi, or the number of Z in Oi","venue":null,"work_id":"69b2d0c2-8d0f-4a9b-8ac2-56b4d6ae4efb","year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":5,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:37.597841Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:16f552eb75403e0e227d66ca7f1494c9fd947ca1422b595222816f517b57b7fb","observation_id":"2e008ca9-0be8-4ee2-9dec-a27918ddc040","resolution":{"observed_at":"2026-08-07T13:15:58.052378Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:57.889539Z","title":"Then, the process fidelity of the target gate U is given by the average of {λi, 1 ≤ i ≤ Kq}, F = 1 Kq Kq ∑ i=1 λi","venue":null,"work_id":"d37f65a4-58b6-4918-b7e2-206e821c7714","year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":6,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:37.703858Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:6ac202ca667b87ed1e3c369de995577fb05069c091c466ad15661402f978ecb4","observation_id":"d6887594-8669-46bb-be15-0d9835529f4d","resolution":{"observed_at":"2026-08-07T13:15:57.945656Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:57.759411Z","title":"\" \"\" # !# $%&'()*+, -./0, $,*0.', $,*0.', 2","venue":null,"work_id":"6eb109c6-d8de-40ff-aaf9-c1bb885df181","year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":7,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:37.821611Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:5c0df819ff18efd2f22ab9285b04eef5b5ade2ffa9a364212cbf521dbf70046b","observation_id":"7513e2f3-1a77-42e7-8b29-ad0d53daaa33","resolution":{"observed_at":"2026-08-07T13:15:57.810932Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":"ph/9611028","doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:55.871166Z","title":"Aharonov, M","venue":null,"work_id":"9e3f6798-f2f1-428b-9e75-432122c27723","year":1996},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":9,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:38.109776Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:f1a60223594701ef08b07ea46683677a6e373b446af0538ba1c7f8a4386cf7cf","observation_id":"6264db01-d30d-44f5-959a-24719e75cec5","resolution":{"observed_at":"2026-08-07T13:15:55.966121Z","resolver_source":"raw_fallback","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":"10.1063/1.4939560","metadata_source":"openalex","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-10T05:30:23.456663Z","title":"M¨ uller - Hermes, D","venue":"Journal of Mathematical Physics","work_id":"14e33077-cf9f-4984-a8e2-6ba35c141886","year":2016},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":10,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:38.262561Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:85a430bd7f96131d5c2fb708fadab3527fe0edb927f98bacc04378c7c8d4accd","observation_id":"c94a60ee-5728-4fee-a970-23069795f4dc","resolution":{"observed_at":"2026-08-07T13:15:55.215084Z","resolver_source":"doi","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:38.381429Z","title":"Stilck Fran¸ ca and R","venue":null,"work_id":null,"year":2021},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":11,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:38.381429Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:e721d914067b6293292a034a12255ce9e24908367c3f28e7423ce3a6e6456712","observation_id":"e1ce2b69-a4c5-4f96-af1e-86b1d0a15663","resolution":{"observed_at":"2026-08-07T13:15:38.381429Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:38.517021Z","title":"Aharonov, X","venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":12,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:38.517021Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:db16aeeb8f268cb2f6ebc516088e84b2461f5a4c0178205acefb6a20ae66c4ad","observation_id":"62aa1b5a-7eea-4300-ba00-de5ebfb19604","resolution":{"observed_at":"2026-08-07T13:15:38.517021Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":"2306.02836","doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:55.645802Z","title":null,"venue":null,"work_id":"8c98128a-de4c-4f49-a7c9-8f83b4bac115","year":2023},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":13,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:38.623775Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:f8845517c94ca307c838ab67489c540505d57789377cb6d122bf9e6a780c975f","observation_id":"5fd79dbe-e311-45d2-861d-10c90bc29a53","resolution":{"observed_at":"2026-08-07T13:15:55.706832Z","resolver_source":"raw_fallback","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:57.595808Z","title":"( 13) gives the global fidelity and local CZ gate fidelities","venue":null,"work_id":"c9677424-19fc-4696-a741-29797781d311","year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":15,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:37.940708Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:376624aa960135d07466bb81637fb09391b59cffedff11de97afdcf17027f39e","observation_id":"00877716-8f33-460e-96e8-66ca007c781c","resolution":{"observed_at":"2026-08-07T13:15:57.659636Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:57.480176Z","title":null,"venue":null,"work_id":"bb449e78-e091-4133-95ea-64a70e72503e","year":2021},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":16,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:38.872727Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:7adce415a57ce95b43e37a357982ba4c9ef40b98451b370cbb17f7ee7a57e456","observation_id":"04e04f43-ed6a-4cb4-b5d4-58498bc7a0f9","resolution":{"observed_at":"2026-08-07T13:15:57.537598Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:39.340506Z","title":null,"venue":null,"work_id":null,"year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":19,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:39.340506Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:9b9db290717b71f56d630ee58552fb511feb6352ee3da4c3b4dcb5e0f72dda8f","observation_id":"8e512bb5-015f-48b8-a844-6a69ee3f40c6","resolution":{"observed_at":"2026-08-07T13:15:39.340506Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:39.454658Z","title":"Aharonov and M","venue":null,"work_id":null,"year":1997},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":20,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:39.454658Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:915ba0479145e157c53e09253e499aef17bb19b496dbc57041f9d4ef69b3576c","observation_id":"f193a0b8-0962-4cee-92e0-c72167a38db4","resolution":{"observed_at":"2026-08-07T13:15:39.454658Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:39.564897Z","title":"Knill, R","venue":null,"work_id":null,"year":1998},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":21,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:39.564897Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:33cfa543f2c63a380d650077e0331f781b3742c0d2b947175bbdaadaee803e18","observation_id":"7399bfbe-5b88-460b-9feb-4f82c7244070","resolution":{"observed_at":"2026-08-07T13:15:39.564897Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:57.369918Z","title":"Barends, J","venue":null,"work_id":"5c8f98c3-aac9-4a50-aa68-e494099ec3e9","year":2014},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":22,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:39.725085Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:fd3cca4659facc9d9812db73665bcb682770fc8e53f41f90bdc4ebaeb3fd0809","observation_id":"dcdfcd67-a6f3-4b11-95fe-d1ed33f2c864","resolution":{"observed_at":"2026-08-07T13:15:57.410762Z","resolver_source":"raw_fallback","status":"malformed_identifier"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:39.804868Z","title":null,"venue":null,"work_id":null,"year":1997},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":23,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:39.804868Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:29307f3c4ab4a96547332f5d7da0820a4584cc037a4ba80ebfa8ff52a927384e","observation_id":"f001764c-fe87-428f-ab1f-edabbf71e265","resolution":{"observed_at":"2026-08-07T13:15:39.804868Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:39.887139Z","title":null,"venue":null,"work_id":null,"year":2011},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":24,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:39.887139Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:4524b6cbf9b1f23164ef1bb4ef51186711f9528a91388738cf7887d05b95fe91","observation_id":"668fa320-ff3a-4377-88e5-692935c70a1c","resolution":{"observed_at":"2026-08-07T13:15:39.887139Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:39.951231Z","title":"Emerson, R","venue":null,"work_id":null,"year":2005},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":25,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:39.951231Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:a80603b1dd966e363fd4b9ac3b1fd32e90589eac19f3a3f3c7d3b3a1f62ec504","observation_id":"deb708e7-3206-446c-8db9-d184002c635f","resolution":{"observed_at":"2026-08-07T13:15:39.951231Z","resolver_source":null,"status":"malformed_identifier"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:40.025778Z","title":"Emerson, M","venue":null,"work_id":null,"year":2007},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":26,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.025778Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:deef8b960fc8f8bc2148a9dd135fd1a81e482c0f0135409b6ef94949b0eb4e79","observation_id":"c00936d0-320b-497a-a538-4e785f40f31e","resolution":{"observed_at":"2026-08-07T13:15:40.025778Z","resolver_source":null,"status":"malformed_identifier"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:40.114187Z","title":"Knill, D","venue":null,"work_id":null,"year":2008},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":27,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.114187Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:292fd6dc9e2ba2a3b0ee485726302f61f2c5af5ef250e866b8dd027cab03bb75","observation_id":"628369cf-4127-4603-9494-03b282ec2044","resolution":{"observed_at":"2026-08-07T13:15:40.114187Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:40.192896Z","title":"Magesan, J","venue":null,"work_id":null,"year":2011},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":28,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.192896Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:554bd00f4d351992b3b1440c2248aa9c67a64065a9463cd766be4dae973a1491","observation_id":"351a59e4-fb93-427d-9092-839d978d09d0","resolution":{"observed_at":"2026-08-07T13:15:40.192896Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:40.287696Z","title":"Magesan, J","venue":null,"work_id":null,"year":2012},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":29,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.287696Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:3d5df8e86fb9ffe304b6f904cc96e5bb3e480f4af6ddd83cd84a3d252e1cbb59","observation_id":"13924936-57cd-4778-bdec-9b3e428c04ef","resolution":{"observed_at":"2026-08-07T13:15:40.287696Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:40.349891Z","title":"Magesan, J","venue":null,"work_id":null,"year":2012},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":30,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.349891Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:d7529293d9673894c0479781c3756246b1b9a6b71d859451ed594633de2990ee","observation_id":"a6fbd43d-f05c-4618-a7f3-13367315516e","resolution":{"observed_at":"2026-08-07T13:15:40.349891Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:40.414687Z","title":null,"venue":null,"work_id":null,"year":2019},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":31,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.414687Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:00ebcebdaa21e4a30720f19113775266e5e977ed75451048289319400ded9fc4","observation_id":"5075720c-e2b5-416d-9a0b-a19e58bb0982","resolution":{"observed_at":"2026-08-07T13:15:40.414687Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:40.492882Z","title":null,"venue":null,"work_id":null,"year":2019},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":32,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.492882Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:f4a41f5f497d09703c2997d640b348ed741ff8b3c1547ecebbe75e1f0c543d8e","observation_id":"995e907b-c3c9-4fec-9b77-8f974d71d580","resolution":{"observed_at":"2026-08-07T13:15:40.492882Z","resolver_source":null,"status":"malformed_identifier"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:40.602942Z","title":"Erhard, J","venue":null,"work_id":null,"year":2019},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":33,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.602942Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:458927e97e2bd82a7836f7f53f5a2967dd5c257c6e0c8157ffd5becfcddf9aa8","observation_id":"d4460f32-293b-43a1-a466-017653ddf914","resolution":{"observed_at":"2026-08-07T13:15:40.602942Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":"10.1103/physrevx.13.041030","metadata_source":"openalex","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-10T05:30:23.456663Z","title":"Hines, M","venue":"Physical Review X","work_id":"0bb73366-0f8c-48fb-b3a8-ced921c9280f","year":2023},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":34,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.691612Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:5133e3a1941db565a276e812c289fc508a01143d60c1c2667870e5e09df1ce62","observation_id":"c79bde84-f554-469f-b491-ddb6cfae40e1","resolution":{"observed_at":"2026-08-07T13:15:54.841328Z","resolver_source":"doi","status":"verified_exact"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:57.159104Z","title":null,"venue":null,"work_id":"e25d5a43-02c3-48ed-9833-33625b42b493","year":2022},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":35,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.774484Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:57b7b8a0844913e1341f9b16cdf4b783b7e50bae2e9d63beab53b283b43fa6bf","observation_id":"3df80ccc-6dc7-4eb3-9b29-69839ea85e8a","resolution":{"observed_at":"2026-08-07T13:15:57.294163Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":{"arxiv_id":"2311.05933","last_updated":"2023-11-10T08:47:31Z","snapshot_observed_at":"2026-08-13T05:28:36.427702Z","submitted_at":"2023-11-10T08:47:31Z","title":"Benchmarking Quantum Processor Performance at Scale","version":1},"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":"2311.05933","snapshot_observed_at":"2026-08-07T13:15:40.941157Z","title":null,"venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":37,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:40.941157Z"},"links":{"cited_paper":"/paper/2311.05933","citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:fc1a0811aef790689ba67b06016b135e2fc1a90b2eac46a34d8b19a651961686","observation_id":"8a8d4485-8657-4576-8b77-eeca8622f1b1","resolution":{"observed_at":"2026-08-07T13:15:40.941157Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:41.020959Z","title":null,"venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":38,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:41.020959Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:59620fe16cc80a2d69060a933f4b2e8331e77ff18f8309c3ac04f8cb2aa16044","observation_id":"3f8c9253-8e85-40e7-81c5-a0c9b73c32da","resolution":{"observed_at":"2026-08-07T13:15:41.020959Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:41.035384Z","title":null,"venue":null,"work_id":null,"year":2023},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":39,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:41.035384Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:a4b66d2c1cdb25bdbff07340e527c6405aaad6268e096aa978ee6b6fbe1245fb","observation_id":"0ad002c2-5845-4ae3-a716-89e84042ab3c","resolution":{"observed_at":"2026-08-07T13:15:41.035384Z","resolver_source":null,"status":"malformed_identifier"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:56.865122Z","title":"Bluvstein, S","venue":null,"work_id":"81e0692b-a01c-45c8-aaf8-a10852132581","year":2024},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":40,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:41.040001Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:cf7db532d4e1e281d7205572c44d8057188ec618cc9315178519f236c498f4a8","observation_id":"d1aadeec-670d-4b52-baaf-d62eb358e5c6","resolution":{"observed_at":"2026-08-07T13:15:56.983119Z","resolver_source":"raw_fallback","status":"malformed_identifier"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:56.608600Z","title":"Zhang, W","venue":null,"work_id":"c8886c3d-399b-40fb-8626-ca988e7a7d14","year":2023},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":41,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:53.881930Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:4d8434712b426c8137800f2a32a0735a6e2028cc4344d1a7b6538d42b21ff710","observation_id":"92d7a033-a0fe-44dd-a8f2-93a62ffb6e17","resolution":{"observed_at":"2026-08-07T13:15:56.724110Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:53.904885Z","title":"Cerezo, A","venue":null,"work_id":null,"year":2021},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":42,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:53.904885Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:e47bd91c07d5c632676020ee95bc289ecdd9f9821302544efcc978c45d063bc6","observation_id":"b8ef4306-43bf-40b1-8b05-6009d447567a","resolution":{"observed_at":"2026-08-07T13:15:53.904885Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:56.430022Z","title":"Raussendorf, D","venue":null,"work_id":"b8f390ad-bb5f-47cf-a308-3d699729342d","year":2003},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":43,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:53.923680Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:de91e1807de38b078efba109a11a3102cb44d2d99e1bed24ab9295166f35156b","observation_id":"31dc2302-1650-46d7-8099-e7be0b1b79d8","resolution":{"observed_at":"2026-08-07T13:15:56.506402Z","resolver_source":"raw_fallback","status":"malformed_identifier"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:53.967102Z","title":null,"venue":null,"work_id":null,"year":2004},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":44,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:53.967102Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:3dff2bfe93b6ddbcf158892c98fed467654ac214aac2bc3852723a6ecfd5e204","observation_id":"1ef9c0e8-ddda-4690-9b2f-874506e7e2c7","resolution":{"observed_at":"2026-08-07T13:15:53.967102Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:53.998477Z","title":null,"venue":null,"work_id":null,"year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":45,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:53.998477Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:5386f1f8e8bc6b19434f56e01dad5840b48d637348c6388d7e9dd93e8d25261e","observation_id":"6c14b6ac-e0de-49d9-9bc4-722bb59002f8","resolution":{"observed_at":"2026-08-07T13:15:53.998477Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:56.297342Z","title":null,"venue":null,"work_id":"04f96d40-6474-47e3-8e05-eb3e12caa755","year":null},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":46,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:54.024473Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:5c0bfeafd9dceb844fe42373cd81fc7df34066de992d94febc50b91c5e0ca367","observation_id":"047e4d73-973d-4538-8799-7c6d445b8c57","resolution":{"observed_at":"2026-08-07T13:15:56.363948Z","resolver_source":"raw_fallback","status":"unresolved"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:54.058904Z","title":"Phys. Rev. Appl. 7, 041001 (2017)","venue":null,"work_id":null,"year":2017},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":47,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:54.058904Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:d38ee1cd42f276508c2e942ab00032e94b298a72fe53ad0b0c9dca869c83d2b2","observation_id":"0019b037-6aea-4c4d-b0e1-0a6623d8c31c","resolution":{"observed_at":"2026-08-07T13:15:54.058904Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:54.100716Z","title":"Stabilizer codes and quantum error correctio n (California Institute of Technology, 1997)","venue":null,"work_id":null,"year":1997},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":48,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:54.100716Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:112e97bd91e544c06fe1b5c3bac35bc34c475a5c81a342f6b650a0bba2ea6aa5","observation_id":"962b5b54-5fe8-433b-8966-274b157e970c","resolution":{"observed_at":"2026-08-07T13:15:54.100716Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:54.138724Z","title":"Nature 627, 778 (2024)","venue":null,"work_id":null,"year":2024},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":49,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:54.138724Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:40c3a85c8dd7dbec427169d2feb36f74886e8803ab4372b46c653c768928f619","observation_id":"25a93c60-5c89-4620-96b5-8c1153e36703","resolution":{"observed_at":"2026-08-07T13:15:54.138724Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:56.167822Z","title":"Phys. Rev. Lett. 127, 180501 (2021)","venue":null,"work_id":"863e16cc-9667-4959-8d49-3c1b72fcc7ee","year":2021},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":50,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:54.211503Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:0ed90f5a3c38c8b0b466b5b46fcce0147670b941f38872b81fb88a6b0b212a4f","observation_id":"f719eb0a-97da-48b9-9278-c1f9921e3394","resolution":{"observed_at":"2026-08-07T13:15:56.227163Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:54.284592Z","title":"Phys. Rev. Lett. 123, 210501 (2021)","venue":null,"work_id":null,"year":2021},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":51,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:54.284592Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:afed6d8f9c68c421513c03fa8b0beb135be4e68f3e9bed7f771fb0fc45f06b3a","observation_id":"7f04c7dc-fa04-43af-bdb8-2fe776537988","resolution":{"observed_at":"2026-08-07T13:15:54.284592Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":"raw_reference","pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:56.037729Z","title":"Boixo, in “APS March Meeting Abstracts (2017), vol","venue":null,"work_id":"92902390-8dd4-4ace-bb2c-a4fba14a3a90","year":2017},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":52,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:54.351467Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:bd54d6fe27d12ea3f328ca2f3917b5bff836288bdb175c2a20f614b0e5b573c4","observation_id":"08451a98-7255-432a-84b1-778555c828da","resolution":{"observed_at":"2026-08-07T13:15:56.104372Z","resolver_source":"raw_fallback","status":"verified_fuzzy"},"standing_notice":{"events":[],"observation":"No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.","reason":null,"source_receipts":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"state":"measured"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:54.422070Z","title":"Nature 574, 505 (2019)","venue":null,"work_id":null,"year":2019},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":53,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:54.422070Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:cb72629e72673ad96071302cdfbfbe2c4ac29f8c38ea469c259f1d444f2b8a63","observation_id":"80a31fc3-53f2-4b1f-84b7-07b969f1ef14","resolution":{"observed_at":"2026-08-07T13:15:54.422070Z","resolver_source":null,"status":"unresolved"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}},{"citation":{"cited_paper":null,"cited_work":{"arxiv_id":null,"doi":null,"metadata_source":null,"pith_arxiv_id":null,"snapshot_observed_at":"2026-08-07T13:15:54.540098Z","title":"Chinese Physics B 30, 044212 (2021)","venue":null,"work_id":null,"year":2021},"citing_paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor","version":1},"reference_index":54,"source":"pdf_text","source_observed_at":"2026-08-07T13:15:54.540098Z"},"links":{"citing_paper":"/paper/2505.22390"},"observation_digest":"sha256:b15a408e5dc67e736613267f0c20cae5374680bd178cd34c4918e963e4be3a86","observation_id":"38e5f550-bd44-4cc3-b864-4fd9fc6425e9","resolution":{"observed_at":"2026-08-07T13:15:54.540098Z","resolver_source":null,"status":"malformed_identifier"},"standing_notice":{"events":[],"reason":"canonical_work_link_unavailable","source_receipts":[],"state":"unavailable"}}],"paper":{"arxiv_id":"2505.22390","last_updated":"2025-05-28T14:17:00Z","latest_version":1,"primary_category":"quant-ph","snapshot_observed_at":"2026-08-07T13:05:49.132249Z","submitted_at":"2025-05-28T14:17:00Z","title":"Calibrating quantum gates up to 52 qubits in a superconducting processor"},"reference_resolution":{"displayed":49,"state_counts":{"malformed_identifier":8,"metadata_mismatch":0,"parse_uncertain":0,"unresolved":30,"verified_exact":4,"verified_fuzzy":7},"total_outbound_references":49},"refusal":"A citation records a reference. It does not transfer a finding from one paper to another.","schema":"pith.paper-citation-record.v1","standing_sources":[{"observed_at":"2026-08-13T06:32:02.005865+00:00","source":"crossref"},{"observed_at":"2026-08-13T06:31:53.387327+00:00","source":"retraction_watch"}],"thesis":"As of 13 August 2026, this Paper Citation Record lists 49 of 49 outbound references and 0 inbound Pith citation observations for arXiv:2505.22390."}