{"record_type":"pith_number_record","schema_url":"https://pith.science/schemas/pith-number/v1.json","pith_number":"pith:2025:25RXTRLCCD7S7PBECYWSDGQ3RH","short_pith_number":"pith:25RXTRLC","schema_version":"1.0","canonical_sha256":"d76379c56210ff2fbc24162d219a1b89c1ad328f083cff5b17ba7a94a20685df","source":{"kind":"arxiv","id":"2504.20653","version":3},"attestation_state":"computed","paper":{"title":"SysVCoder: An LLM-Driven Framework for Systematic Generation of System-Level Design","license":"http://creativecommons.org/licenses/by-nc-nd/4.0/","headline":"","cross_cats":["cs.SY","eess.SY"],"primary_cat":"cs.SE","authors_text":"Chen Liang, Jian Zuo, Junzhe Liu, Mengying Zhao, Navya Goli, Umamaheswara Rao Tida, Xianyong Wang, Zhaoyan Shen, Zhenge Jia","submitted_at":"2025-04-29T11:22:06Z","abstract_excerpt":"Recent advances in large language models (LLMs) have demonstrated strong potential in generating hardware designs using hardware description languages (HDLs) such as Verilog. However, existing LLM-based frameworks struggle to accurately capture the complexity of real-world architectural designs, particularly for large-scale systems with hierarchical, multi-level module instantiations. To address this issue, we present SysVCoder, an LLM-driven framework that enhances both the generation quality and efficiency of system-level design in Verilog. SysVCoder introduces a two-stage generation pipelin"},"verification_status":{"content_addressed":true,"pith_receipt":true,"author_attested":false,"weak_author_claims":0,"strong_author_claims":0,"externally_anchored":false,"storage_verified":false,"citation_signatures":0,"replication_records":0,"graph_snapshot":true,"references_resolved":false,"formal_links_present":false},"canonical_record":{"source":{"id":"2504.20653","kind":"arxiv","version":3},"metadata":{"license":"http://creativecommons.org/licenses/by-nc-nd/4.0/","primary_cat":"cs.SE","submitted_at":"2025-04-29T11:22:06Z","cross_cats_sorted":["cs.SY","eess.SY"],"title_canon_sha256":"cd7bf6c28d4f1c7ff924b0d2825ece085bdd4f8a5cb76c74512cc77f9a3e071b","abstract_canon_sha256":"4b14aa38e971172ed8cbe016157c92327f3c874eea3d8c9a9a552ca1bb700044"},"schema_version":"1.0"},"receipt":{"kind":"pith_receipt","key_id":"pith-v1-2026-05","algorithm":"ed25519","signed_at":"2026-07-01T01:17:39.799620Z","signature_b64":"wY+NTQYh/JgRW1b1gi16aeN/8LDy2YfhjGgFJfGN4ypcCNny/H6PTan7Pf4ZmrPksLdrP3E9eR9Ts5VPKgOgBg==","signed_message":"canonical_sha256_bytes","builder_version":"pith-number-builder-2026-05-17-v1","receipt_version":"0.3","canonical_sha256":"d76379c56210ff2fbc24162d219a1b89c1ad328f083cff5b17ba7a94a20685df","last_reissued_at":"2026-07-01T01:17:39.799104Z","signature_status":"signed_v1","first_computed_at":"2026-07-01T01:17:39.799104Z","public_key_fingerprint":"8d4b5ee74e4693bcd1df2446408b0d54"},"graph_snapshot":{"paper":{"title":"SysVCoder: An LLM-Driven Framework for Systematic Generation of System-Level Design","license":"http://creativecommons.org/licenses/by-nc-nd/4.0/","headline":"","cross_cats":["cs.SY","eess.SY"],"primary_cat":"cs.SE","authors_text":"Chen Liang, Jian Zuo, Junzhe Liu, Mengying Zhao, Navya Goli, Umamaheswara Rao Tida, Xianyong Wang, Zhaoyan Shen, Zhenge Jia","submitted_at":"2025-04-29T11:22:06Z","abstract_excerpt":"Recent advances in large language models (LLMs) have demonstrated strong potential in generating hardware designs using hardware description languages (HDLs) such as Verilog. However, existing LLM-based frameworks struggle to accurately capture the complexity of real-world architectural designs, particularly for large-scale systems with hierarchical, multi-level module instantiations. To address this issue, we present SysVCoder, an LLM-driven framework that enhances both the generation quality and efficiency of system-level design in Verilog. SysVCoder introduces a two-stage generation pipelin"},"claims":{"count":0,"items":[],"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"source":{"id":"2504.20653","kind":"arxiv","version":3},"verdict":{"id":null,"model_set":{},"created_at":null,"strongest_claim":"","one_line_summary":"","pipeline_version":null,"weakest_assumption":"","pith_extraction_headline":""},"integrity":{"clean":true,"summary":{"advisory":0,"critical":0,"by_detector":{},"informational":0},"endpoint":"/pith/2504.20653/integrity.json","findings":[],"available":true,"detectors_run":[],"snapshot_sha256":"c28c3603d3b5d939e8dc4c7e95fa8dfce3d595e45f758748cecf8e644a296938"},"references":{"count":0,"sample":[],"resolved_work":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57","internal_anchors":0},"formal_canon":{"evidence_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"author_claims":{"count":0,"strong_count":0,"snapshot_sha256":"258153158e38e3291e3d48162225fcdb2d5a3ed65a07baac614ab91432fd4f57"},"builder_version":"pith-number-builder-2026-05-17-v1"},"aliases":[{"alias_kind":"arxiv","alias_value":"2504.20653","created_at":"2026-07-01T01:17:39.799157+00:00"},{"alias_kind":"arxiv_version","alias_value":"2504.20653v3","created_at":"2026-07-01T01:17:39.799157+00:00"},{"alias_kind":"doi","alias_value":"10.48550/arxiv.2504.20653","created_at":"2026-07-01T01:17:39.799157+00:00"},{"alias_kind":"pith_short_12","alias_value":"25RXTRLCCD7S","created_at":"2026-07-01T01:17:39.799157+00:00"},{"alias_kind":"pith_short_16","alias_value":"25RXTRLCCD7S7PBE","created_at":"2026-07-01T01:17:39.799157+00:00"},{"alias_kind":"pith_short_8","alias_value":"25RXTRLC","created_at":"2026-07-01T01:17:39.799157+00:00"}],"events":[],"event_summary":{},"paper_claims":[],"inbound_citations":{"count":0,"internal_anchor_count":0,"sample":[]},"formal_canon":{"evidence_count":0,"sample":[],"anchors":[]},"links":{"html":"https://pith.science/pith/25RXTRLCCD7S7PBECYWSDGQ3RH","json":"https://pith.science/pith/25RXTRLCCD7S7PBECYWSDGQ3RH.json","graph_json":"https://pith.science/api/pith-number/25RXTRLCCD7S7PBECYWSDGQ3RH/graph.json","events_json":"https://pith.science/api/pith-number/25RXTRLCCD7S7PBECYWSDGQ3RH/events.json","paper":"https://pith.science/paper/25RXTRLC"},"agent_actions":{"view_html":"https://pith.science/pith/25RXTRLCCD7S7PBECYWSDGQ3RH","download_json":"https://pith.science/pith/25RXTRLCCD7S7PBECYWSDGQ3RH.json","view_paper":"https://pith.science/paper/25RXTRLC","resolve_alias":"https://pith.science/api/pith-number/resolve?arxiv=2504.20653&json=true","fetch_graph":"https://pith.science/api/pith-number/25RXTRLCCD7S7PBECYWSDGQ3RH/graph.json","fetch_events":"https://pith.science/api/pith-number/25RXTRLCCD7S7PBECYWSDGQ3RH/events.json","actions":{"anchor_timestamp":"https://pith.science/pith/25RXTRLCCD7S7PBECYWSDGQ3RH/action/timestamp_anchor","attest_storage":"https://pith.science/pith/25RXTRLCCD7S7PBECYWSDGQ3RH/action/storage_attestation","attest_author":"https://pith.science/pith/25RXTRLCCD7S7PBECYWSDGQ3RH/action/author_attestation","sign_citation":"https://pith.science/pith/25RXTRLCCD7S7PBECYWSDGQ3RH/action/citation_signature","submit_replication":"https://pith.science/pith/25RXTRLCCD7S7PBECYWSDGQ3RH/action/replication_record"}},"created_at":"2026-07-01T01:17:39.799157+00:00","updated_at":"2026-07-01T01:17:39.799157+00:00"}