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Prototype of a transient waveform recording ASIC

T0 review · 1 major / 0 minor · reviewed 2026-05-25 · grok-4.3

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Pith's one-line read This ASIC prototype achieves timing precision better than 15 ps RMS through timing interval calibration.

desk verdict This is a working SCA ASIC prototype with measured sampling and bandwidth specs, but the 15 ps timing claim rests on calibration details not shown in the abstract. read the letter →

arxiv 1907.02969 v1 pith:BCQQPUO4 submitted 2019-07-05 physics.ins-det

Jiajun Qin , Lei Zhao , Boyu Cheng , Han Chen , Yuxiang Guo , Shubin Liu , Qi An This is my paper · ORCID
classification physics.ins-det
keywords ASICSwitchedCapacitorArraySCAwaveformrecordingtimingprecisionWilkinsonADCCMOSprototype
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper describes the design and testing of a two-channel transient waveform recording ASIC using switched capacitor array technology. Each channel has 128 samples, a 12-bit Wilkinson ADC, and supports serial readout. Tests confirm a 1 V voltage range, about 450 MHz analog bandwidth, and sampling rates from 0.076 to 3.2 Gsps. With calibration of sampling intervals, the timing precision reaches better than 15 ps RMS, which would allow more accurate waveform timing in applications like particle physics detectors.

What carries the argument

Switched Capacitor Array (SCA) with 128-sample depth per channel and Wilkinson ADC, using timing interval calibration to improve resolution.

What would settle it

An independent measurement of the timing resolution under realistic operating conditions that exceeds 15 ps RMS would disprove the claim.

Watch

Extended reading notes

Core claim

The ASIC based on the Switched Capacitor Array architecture demonstrates adjustable sampling speeds up to 3.2 Gsps and, after careful calibration of timing intervals between samples, achieves a timing precision better than 15 ps RMS.

Load-bearing premise

The timing calibration procedure fully accounts for all variations in sampling intervals and the test measurements accurately represent the chip's performance under operational conditions.

Editorial extensions

If this is right

  • Full 1 V signal voltage range is available for recording.
  • Input analog bandwidth reaches approximately 450 MHz.
  • Sampling speed is adjustable from 0.076 to 3.2 Gsps.
  • The device supports serial data readout for the recorded waveforms.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Such timing precision could improve event reconstruction in high-energy physics experiments.
  • Integration with other detector systems might enable better synchronization across multiple channels.
  • Further scaling to more channels could be tested for larger detector arrays.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, simulated authors' rebuttal, and a circularity audit.

Referee Report

1 major / 0 minor

Summary. The manuscript presents the design and test results of a two-channel prototype transient waveform recording ASIC in 0.18 μm CMOS using a Switched Capacitor Array (SCA) architecture with 128-sample depth per channel, a 12-bit Wilkinson ADC, and serial readout. Reported performance includes a 1 V signal range, ~450 MHz analog bandwidth, adjustable sampling rates from 0.076 to 3.2 Gsps, and a timing precision better than 15 ps RMS after careful calibration of sampling intervals.

Significance. If the timing-precision result is substantiated with reproducible calibration details and representative test conditions, the work would provide a useful incremental contribution to SCA-based waveform digitizers for applications such as particle-physics instrumentation or time-of-flight measurements, demonstrating competitive performance in a standard CMOS process.

major comments (1)
  1. [Abstract] Abstract: the central claim that timing precision is 'proved to be better than 15 ps RMS' after 'careful calibration' is load-bearing, yet the abstract (and, per the provided stress-test note, the manuscript) supplies no description of the calibration algorithm, the test waveform, the statistical extraction method for the RMS figure, or cross-checks against temperature drift, supply variation, or capacitor mismatch. Without these specifics the claim cannot be evaluated.

Simulated Author's Rebuttal

1 responses · 0 unresolved

We thank the referee for the detailed review and constructive comments on our manuscript. We address the major comment point by point below and will incorporate revisions as indicated.

read point-by-point responses

  1. Referee: [Abstract] Abstract: the central claim that timing precision is 'proved to be better than 15 ps RMS' after 'careful calibration' is load-bearing, yet the abstract (and, per the provided stress-test note, the manuscript) supplies no description of the calibration algorithm, the test waveform, the statistical extraction method for the RMS figure, or cross-checks against temperature drift, supply variation, or capacitor mismatch. Without these specifics the claim cannot be evaluated.

    Authors: We agree that the timing-precision result requires more supporting detail to allow independent evaluation. The current manuscript text is concise on this point and does not include the requested elements. In the revised version we will add a dedicated subsection describing the calibration algorithm, the test waveform and setup, the statistical procedure used to extract the RMS value, and any cross-checks performed for temperature, supply, or mismatch effects. We will also revise the abstract to indicate that these details are now provided in the body of the paper. revision: yes

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: experimental hardware measurements with no derivations or fitted predictions

full rationale

The paper reports ASIC design, fabrication, and bench measurements of an SCA-based waveform recorder. The timing precision claim (<15 ps RMS) is presented as a direct experimental outcome after 'careful calibration' of sampling intervals; no equations, first-principles derivations, parameter fits, or predictions appear in the abstract or described content. No self-citations, uniqueness theorems, or ansatzes are invoked. The work is self-contained as a prototype characterization report; the central result does not reduce to its own inputs by construction.

Assumptions & free parameters 0 free parameters · 0 assumptions · 0 invented entities

The paper describes an experimental hardware prototype without any mathematical derivations or models that introduce free parameters, axioms, or invented entities.

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Cite this review

Pith. "Pith review of Prototype of a transient waveform recording ASIC." pith.science (2026). https://pith.science/paper/BCQQPUO4

@misc{pith2026190702969,
  author       = {Pith},
  title        = {Pith review of: Prototype of a transient waveform recording ASIC},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/BCQQPUO4}},
  note         = {Machine review of arXiv:1907.02969}
}
read the original abstract

The paper presents the design and measurement results of a transient waveform recording ASIC based on the Switched Capacitor Array (SCA) architecture. This 0.18 {\mu}m CMOS prototype device contains two channels and each channel employs a SCA of 128 samples deep, a 12-bit Wilkinson ADC and a serial data readout. A series of tests have been conducted and the results indicate that: a full 1 V signal voltage range is available, the input analog bandwidth is approximately 450 MHz and the sampling speed is adjustable from 0.076 to 3.2 Gsps (Gigabit Samples Per Second). For precision waveform timing extraction, careful calibration of timing intervals between samples is conducted to improve the timing resolution of such chips, and the timing precision of this ASIC is proved to be better than 15 ps RMS.

Figures

Figures reproduced from arXiv: 1907.02969 by the authors.

Figure 7
Figure 7. A stable sampling rate ranging from 76 Msps [PITH_FULL_IMAGE:figures/full_fig_p006_7.png] view at source ↗

Discussion (0). Continue with ORCID to comment.

Reference graph

Works this paper leans on

15 extracted references · 15 canonical work pages

  1. [1]

    Bourgeois, G

    F. Bourgeois, G. Carboni, T. Del Prete et al., Results of a 100 MHz FADC system built in fastbus used by the UA2 vertex detector, Nucl. Instrum. Meth. A 252 (1986) 590-595

    work page 1986

  2. [2]

    Baixeras, D

    C. Baixeras, D. Bastieri, C. Bigongiari et al., Commissioning and first tests of the MAGIC telescope, Nucl. Instrum. Meth. A 518 (2004), 188-192

    work page 2004

  3. [3]

    Dhawan, V.W

    S. Dhawan, V.W. Hughes, and D. Kawall et al., A quad 500 MHz waveform digitizer with differential trigger for use in the muon g-2 experiment, Nucl. Instrum. Meth. A 450 (2000), 391-398

    work page 2000

  4. [4]

    Pegna et al., Performance of the domino ring sampler in the MAGIC experiment , Nucl

    R. Pegna et al., Performance of the domino ring sampler in the MAGIC experiment , Nucl. Instrum. Meth. A 567 (2006), 218–221

    work page 2006

  5. [5]

    Lachartre and F

    D. Lachartre and F. Feinstein, Application specific integrated circuits for ANTARES offshore front- end electronics, Nucl. Instrum. Meth. A 442 (2000), 99–104

    work page 2000

  6. [6]

    Delagnes, Y

    E. Delagnes, Y. Degerli, P. Goret et al., SAM: A new GHz sampling ASIC for the H.E.S.S.-II front- end electronics, Nucl. Instrum. Meth. A 567 (2006) 21-26

    work page 2006

  7. [7]

    Bechtol, S

    K. Bechtol, S. Funk, A. Okumura et al., TARGET: A multi-channel digitizer chip for very-high-energy gamma-ray telescopes, Astroparticle Physics 36 (2012) 156-165

    work page 2012

  8. [8]

    Hoover et al., Observation of Ultra-high-ener gy Cosmic Rays with the ANITA Balloon-borne Radio Interferometer, Phys

    ANITA collaboration, S. Hoover et al., Observation of Ultra-high-ener gy Cosmic Rays with the ANITA Balloon-borne Radio Interferometer, Phys. Rev. Lett. 105 (2010) 151101

    work page 2010

Show all 15 references
  1. [9]

    Varner, L.L

    G.S. Varner, L.L. Ruckman, J.W. Nam et al., The large analog bandwidth recorder and digitizer with ordered readout (LABRADOR) ASIC, Nucl. Instrum. Meth. A 583 (2007) 447-460

    2007

  2. [10]

    S. Ritt, R. Dinapoli, U. Hartmann. Application of the DRS chip for fast waveform digitizing , Nucl. Instrum. Meth. A 623 (2010) 486-488

    2010

  3. [11]

    Pegna et al., A GHz sampling DAQ system for the MAGIC-II telescope , Nucl

    R. Pegna et al., A GHz sampling DAQ system for the MAGIC-II telescope , Nucl. Instrum. Meth. A 572 (2007) 382-384

    2007

  4. [12]

    Oberla, J

    E. Oberla, J. Genat, H. Grabas, et al., A 15 GSa/s, 1.5 GHz bandwidth waveform digitizing ASIC, Nucl. Instrum. Meth. A 735 (2014) 452-461

    2014

  5. [13]

    Kleinfelder, Gigahertz Waveform Sampling and Digitization Circuit Design and Implementation , IEEE Trans

    S. Kleinfelder, Gigahertz Waveform Sampling and Digitization Circuit Design and Implementation , IEEE Trans. Nucl. Sci. NS-50 (2003) 955

    2003

  6. [14]

    Stricker-Shaver, S

    D. Stricker-Shaver, S. Ritt, and B. J. Pichler, Novel Calibration Method for Switched Capacitor Arrays Enables Time Measurements With Sub-Picosecond Resolution, IEEE Trans. Nucl. Sci, 2014, 61 (6): 3607-3617

    2014

  7. [15]

    J. Wang, L. Zhao, C. Feng et al., Evaluation of a Fast Pulse Sampling Module with Switched- Capacitor Arrays, IEEE Trans. Nucl. Sci, 2012, 59 (5): 2435-2443

    2012

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