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A Low-Power, Low-Latency, Dual-Channel Serializer ASIC for Detector Front-End Readout

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arxiv 2009.07130 v1 pith:KGSYYALY submitted 2020-09-14 physics.ins-det

A Low-Power, Low-Latency, Dual-Channel Serializer ASIC for Detector Front-End Readout

Le Xiaoa , Datao Gong , Tiankuan Liu , Jinghong Chen , Qingjun Fan , Yulang Feng , Di Guo , Huiqin He
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Suen Hou Guangming Huang Xiaoting Lig Chonghan Liu Quan Sun Xiangming Sun Ping-Kun Teng Jian Wang Annie C. Xiang Dongxu Yang Jingbo Ye
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classification physics.ins-det
keywords locx2locx2-130asicchannelcmosdetectordual-channelfabricated
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In this paper, we present a dual-channel serializer ASIC, LOCx2, and its pin-compatible backup, LOCx2-130, for detector front-end readout. LOCx2 is fabricated in a 0.25-um Silicon-on-Sapphire CMOS process and each channel operates at 5.12 Gbps, while LOCx2-130 is fabricated in a 130-nm bulk CMOS process and each channel operates at 4.8 Gbps. The power consumption and the transmission latency are 900 mW and 27 ns for LOCx2 and the corresponding simulation result of LOCx2-130 are 386 mW and 38 ns, respectively.

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