Pith. sign in

REVIEW 1 cited by

Adiabatic Quantum Algorithm for Multijet Clustering in High Energy Physics

Not yet reviewed by Pith; the record is open.

This paper has not been read by Pith yet. Machine review is queued; the pith claim, tier, and objections will appear here once it completes.

SPECIMEN: schema-true, not a live event

T0 review · schema-true

One-sentence machine reading of the paper's core claim.

pith:XXXXXXXX · record.json · timestamp

arxiv 2012.14514 v1 pith:5ZFZ3WSI submitted 2020-12-28 hep-ex quant-ph

Adiabatic Quantum Algorithm for Multijet Clustering in High Energy Physics

classification hep-ex quant-ph
keywords clusteringquantumalgorithmannealingeventmultijetproblemadditionally
verification ladder T0 review T1 audit T2 compute T3 formal T4 reserved
0 comments
read the original abstract

The currently predicted increase in computational demand for the upcoming High-Luminosity Large Hadron Collider (HL-LHC) event reconstruction, and in particular jet clustering, is bound to challenge present day computing resources, becoming an even more complex combinatorial problem. In this paper, we show that quantum annealing can tackle dijet event clustering by introducing a novel quantum annealing binary clustering algorithm. The benchmarked efficiency is of the order of $96\%$, thus yielding substantial improvements over the current quantum state-of-the-art. Additionally, we also show how to generalize the proposed objective function into a more versatile form, capable of solving the clustering problem in multijet events.

discussion (0)

Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.

Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score.

  1. Overview of Applications of Quantum Computing in QCD

    hep-ph 2026-07 accept novelty 2.0

    A concise literature overview of quantum algorithms for QCD and collider tasks, stressing possible advantages over classical methods and NISQ hardware limits.