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Distributed quantum error correction for chip-level catastrophic errors

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arxiv 2203.16488 v1 pith:JXE6NQFY submitted 2022-03-30 quant-ph

classification quant-ph
keywords quantumerrorerrorscatastrophicchip-levelcorrectiondistributedevents
verification ladder T0 review T1 audit T2 compute T3 formal
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Quantum error correction holds the key to scaling up quantum computers. Cosmic ray events severely impact the operation of a quantum computer by causing chip-level catastrophic errors, essentially erasing the information encoded in a chip. Here, we present a distributed error correction scheme to combat the devastating effect of such events by introducing an additional layer of quantum erasure error correcting code across separate chips. We show that our scheme is fault tolerant against chip-level catastrophic errors and discuss its experimental implementation using superconducting qubits with microwave links. Our analysis shows that in state-of-the-art experiments, it is possible to suppress the rate of these errors from 1 per 10 seconds to less than 1 per month.

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Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Q3DE: A fault-tolerant quantum computer architecture for multi-bit burst errors by cosmic rays

    quant-ph 2024-12 conditional novelty 7.0 of 10

    Q3DE detects cosmic-ray-induced multi-bit burst errors from syndrome statistics alone and mitigates them through dynamic code-distance expansion and decoder rollback, cutting the exposed error period by about 1000 times.

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