Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays
As of 15 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2301.00861.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-15T06:32:42.880941+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-07T23:42:25.142657Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-05-10T23:05:48.707986Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 80a7fb2b-69cb-4299-9955-56cd0fe13943 · inbound
InTAR: Inter-Task Auto-Reconfigurable Accelerator Design for High Data Volume Variation in DNNs cites this paper.
InTAR: Inter-Task Auto-Reconfigurable Accelerator Design for High Data Volume Variation in DNNs Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays
Reference 21
- Resolution
- unresolved
- no resolver link, observed 2026-08-07T23:42:25.142657Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation f0926251-e976-45aa-a747-e5d3b89d113b · inbound
Mestra: Exploring Migration on Virtualized CGRAs cites this paper.
Mestra: Exploring Migration on Virtualized CGRAs Hardware Abstractions and Hardware Mechanisms to Support Multi-Task Execution on Coarse-Grained Reconfigurable Arrays
Reference 16
- Resolution
- verified exact
- arxiv_id, observed 2026-05-10T23:05:48.713894Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-15T06:32:42.880941+00:00.