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REVIEW 4 major objections 5 minor 1 cited by

Near-Term Spin-Qubit Architecture Design via Multipartite Maximally-Entangled States

T0 review · 4 major / 5 minor · reviewed 2026-08-11 · deepseek-v4-flash

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Pith's one-line read For seven-qubit spin-qubit circuits, extra on-chip connectivity does not pay: compilation makes sparse arrays competitive, and crosstalk makes dense arrays worst.

desk verdict A useful simulation framework for spin-qubit architecture comparison, but the headline crosstalk result rests on underspecified parameters. read the letter →

arxiv 2412.12874 v2 pith:BGKJ6ESQ submitted 2024-12-17 quant-ph

Nikiforos Paraskevopoulos , Matthew Steinberg , Brennan Undseth , Aritra Sarkar , Lieven M. K. Vandersypen , Xiao Xue , Sebastian Feld This is my paper · ORCID
classification quant-ph MSC 81P6881P4081P45 PACS 03.67.-a03.67.Lx03.67.Mn85.35.Gv
keywords spinqubitsbilineararraysmultipartiteentanglementAMEstatescrosstalkquantumcompilationsurfacecodetripartitemutualinformation
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper asks whether adding local connectivity to a near-term spin-qubit array is worth the fabrication effort, and answers no for the seven-qubit circuits it tests. It introduces four entanglement-based metrics—the Bell operator, the logical success rate of a small surface code, a decoherence-modified estimated success probability, and the tripartite mutual information—and evaluates them on three bilinear connectivity graphs at four lattice sizes under three escalating noise models. With spin-qubit-aware compilation, the sparsely connected graphs reach metric values close to the most connected one; when crosstalk is included at realistic error rates, the ordering flips and the most connected array performs worst. The implication, if the simulations hold, is that compiler development and sparse lattices are a better near-term investment than dense local wiring.

What carries the argument

The load-bearing objects are absolutely maximally entangled (AME) states, $n$-qudit pure states whose reduction to any $\lfloor n/2 \rfloor$ parties is maximally mixed, and their generalization to $k$-uniform states; AME and $k$-uniform states are dual to quantum error-correcting codes of maximal distance, so preparing them on a device is a proxy for how well that device can support a small logical code. The paper uses the AME(6,2) graph state and the planar 2-uniform state underlying the $\llbracket 4,1,2 \rrbracket$ surface code, and tracks four quantities: the Bell operator $\langle B \rangle$ built from the stabilizers, the logical success rate $p_s$ of repeated stabilizer measurements, the estimated success probability ESP multiplied by a decoherence factor $e^{-t/T_2}$, and the tripartite mutual information $I_3$. These are evaluated on compiled circuits, and the compilation step—initial placement plus shuttling-aware routing—is what allows sparse architectures to keep up. The crosstalk model adds a random CPHASE gate after each two-qubit gate with probability $p_{\mathrm{cross}} = 10(p_1^r/3\xi)$, where $\xi$ is an unspecified factor meant to capture that crosstalk grows with connectivity.

What would settle it

A direct hardware comparison would settle the claim: prepare the AME(6,2) state and run five cycles of the $\llbracket4,1,2\rrbracket$ code on a sparse and a dense bilinear array with identical physical gate times, using crosstalk calibrated from idle-qubit phase shifts during a two-qubit gate; if the dense array still outperforms the sparse one at error rates near 3 percent, the paper's central negative claim fails.

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Extended reading notes

Core claim

The authors establish that, under their compiler and noise assumptions, a sparsely connected bilinear spin-qubit lattice can reach metric values comparable to the most connected one, and that crosstalk at realistic error rates removes the residual benefit of connectivity. On the paper's own terms, the central discovery is that the presumed benefit of local connectivity is mostly a compilation artifact: once circuits are mapped with a spin-qubit-specific compiler that uses shuttling, sparse connectivity graphs reproduce the Bell-operator values, logical success rates, and estimated success probabilities of the most connected graph to within a few percent, and the measured tripartite mutual information $I_3$ converges across all connectivity graphs after roughly five to six stabilizer cycles. In the crosstalk simulations, by error rate $p_1^r = 0.03$ the advantage of the most connected graph over the intermediate one has vanished, and at $0.05$ and $0.08$ the most connected graph has the worst $I_3$ of the three. The paper also reports that, over all tested sizes, the 2×6 array (with seven qubits on twelve sites) consistently yields the lowest $I_3$, a filling fraction near the site-percolation threshold.

Load-bearing premise

The claim that connectivity advantages vanish rests on the paper's crosstalk model, in which the probability of a crosstalk error is proportional to a single-qubit error rate divided by an unspecified connectivity-scaling factor, and in which no two gates are ever executed at the same time; if real crosstalk in spin-qubit devices behaves differently, the conclusion would not follow.

Editorial extensions

If this is right

  • For near-term seven-qubit experiments, spending fabrication effort on a highly connected bilinear array is not justified: a sparsely connected, compiler-optimized array reaches comparable Bell-operator, logical-success, and ESP values.
  • At realistic crosstalk error rates, the most connected array can have the worst tripartite mutual information, so connectivity can be a liability rather than an asset.
  • Small error-detection experiments with up to about five stabilizer cycles are viable on all tested connectivity graphs; after that the logical success rates converge, so further cycles do not discriminate among architectures.
  • Lowering qubit density by using a larger lattice improves entanglement metrics, with the 2×6 array, whose filling fraction 7/12 sits near the site-percolation threshold, giving the best $I_3$ values.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • If the crosstalk scaling transfers to other qubit technologies, the framework predicts a crossover error rate for each platform beyond which dense local connectivity is counterproductive; that rate could be estimated from two-qubit gate spectroscopy and used as a design parameter before fabrication.
  • The paper's reliance on a generic placement heuristic suggests that a shuttle-aware initial-placement algorithm with solution-quality guarantees might make sparse arrays look even better; this is a testable extension the paper itself flags.
  • The observed crossing of $I_3$ from negative to positive after about two stabilizer cycles hints that these compiled small circuits could be used to probe measurement-induced transitions in spin-qubit hardware, although the paper leaves that as future work.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

4 major / 5 minor

Summary. The manuscript proposes a benchmarking framework for near-term spin-qubit architectures based on four quantities: the Bell-operator expectation for an AME(6,2) state-generation circuit, the logical success rate of a [[4,1,2]] error-detecting surface code, a decoherence-modified estimated success probability (ESP), and the tripartite mutual information I3. Using the SpinQ compiler with SABRE initial placement and beSnake routing, the authors compare three bilinear connectivity graphs (CG1, CG2, CG3) at four lattice sizes under two main error models, with a crosstalk extension in Section III D 1. The central claims are that, under compilation, sparsely connected lattices can approach the metric values of the most connected architecture, and that at realistic crosstalk error rates the benefits of advanced local connectivity vanish (Figure 9 and Table III).

Significance. If the conclusions are robust, the framework provides a useful pre-fabrication design tool and challenges the common assumption that higher local connectivity is always beneficial for near-term spin-qubit devices. The paper grounds its hardware parameters in published spin-qubit experiments, uses two independent simulation pipelines, and explicitly connects MME states to quantum error correction. The work is also timely given ongoing efforts to scale spin-qubit arrays. However, the significance hinges on the crosstalk model and on the statistical reliability of small metric differences; both need to be established before the strong architectural claims can be accepted.

major comments (4)
  1. [Section III D 1] The central negative result in Figure 9 and Table III rests on a crosstalk model whose key parameters are not specified. The probability pcross = 10(pr1/(3ξ)) contains ξ, which is described only as accounting for connectivity differences, with no numerical value, formula, or calibration source; the CPHASE(ζ) gate defined in Eq. (21) has ζ never assigned. As a result, the magnitude of crosstalk and its dependence on connectivity are unreproducible, and the ordering of CG1, CG2, and CG3 at higher error rates could change with different choices of ξ and ζ. Please report these parameters, justify them from measured spin-qubit crosstalk or an explicit physical model, and provide a sensitivity analysis over their plausible ranges.
  2. [Section III D 1 / Section II F] The crosstalk model violates locality by pairing one operand of a two-qubit gate with a randomly selected non-operational qubit. Physical spin-qubit crosstalk is typically local exchange or electrostatic coupling between neighboring dots, while the model also excludes crosstalk from parallel operations because Section II F assumes no gates run in parallel. The nonlocal model may over- or underestimate crosstalk for dense, highly connected arrays, and the no-parallelization assumption removes what is often a dominant crosstalk mechanism. A test with a local crosstalk model, or with parallel gates, is needed before the claim that the benefits of advanced local connectivity vanish can be accepted.
  3. [Table III / Figure 9] The numerical differences supporting the crosstalk conclusion are very small relative to the Monte Carlo sampling used. At error rate 0.08 with crosstalk, the average I3 values are 2.0688 (CG1), 2.0778 (CG2), and 2.0909 (CG3), a spread of about 0.02 on a quantity that increases from roughly 1.98 to 2.09 over the error-rate sweep. No error bars, confidence intervals, or significance tests are reported for any of the figures, despite 2,000–20,000 trials per data point. The claim that CG3 becomes worse than CG1 and CG2 at high error rates needs statistical support, especially because the paper itself emphasizes that small I3 changes can indicate qualitative transitions.
  4. [Section II E / Figure 10] The shuttle counts, and hence the ESP, Bell-operator, and I3 values, depend on the SABRE initial placement, which the paper shows is not stable: Figure 10 displays shuttle counts varying by hundreds depending on the number of SABRE trials. Since a single seed and trial setting is used for the main results, the architecture ranking—particularly the CG2 fluctuations in Figure 5b and Table I—may reflect placement noise rather than architectural merit. A sensitivity analysis over seeds and SABRE trial counts, or the use of a shuttle-aware placement algorithm, is needed to support the claim that compilation closes the connectivity gap.
minor comments (5)
  1. [Figure 5] Plotting ⟨B⟩ (around 40), ESP (around 10^-8), and shuttle count (hundreds to thousands) on a single vertical axis makes visual comparison difficult; twin axes or normalized quantities would improve readability.
  2. [Section II F / Figure 3] The abstract and Figure 3 state that each circuit uses seven qubits in total, but the AME(6,2) circuit uses six qubits; the role of the seventh qubit, if any, should be clarified.
  3. [Section II B] The notation 'J4, 1, 2K' should be replaced with the standard [[4,1,2]] notation for clarity.
  4. [Section II D / Eq. (20)] Equation (20) does not define how the total circuit time t is accumulated from gate durations, shuttle durations, and measurement times; specifying this would make the ESP computation reproducible.
  5. [Table III / Figure 9] The caption and table should state the averaging domain explicitly: whether the reported I3 values are averaged over lattice sizes, cycles, or both, and over which set of error rates.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the four metrics are independently defined, and the crosstalk result is an explicitly conditional simulation outcome rather than a fitted or self-referential premise.

full rationale

The paper's derivation chain is self-contained with respect to its main comparisons. The Bell operator, logical success rate, ESP, and I3 are defined in Sections II A-D from independent quantum-information constructs, and the AME(6,2) circuit and the J4,1,2K surface code are taken from external literature; the same compiled circuits are then run on CG1-CG3, so the architecture ordering is a simulation output rather than an input. The correlation between shuttle count, ESP, and ⟨B⟩ is explicitly disclosed in Section IV as a consequence of simulation construction, not presented as a first-principles prediction. The load-bearing negative crosstalk result rests on an admittedly 'naive model' (Section III D 1) in which pcross contains an unreported connectivity-related factor ξ and the CPHASE(ζ) angle ζ is never specified; this is a serious reproducibility and support weakness, but it is not circularity: the assumption that crosstalk is more prevalent in highly-connected devices (cited to external refs [152,153]) does not by itself force CG3 to become worse in I3, which emerges only after tensor-network simulation. Self-citations to SpinQ [11] and beSnake [53] are tool citations to reproducible software, not load-bearing justifications of the physical conclusions. No step reduces by construction to its own input.

Assumptions & free parameters 4 free parameters · 5 assumptions · 0 invented entities

The central claims rest mainly on standard quantum-information facts and on the chosen simulation parameters. The most fragile elements are the crosstalk scaling model and the no-parallelization simplification, both of which are modeling assumptions rather than measured hardware behavior.

free parameters (4)
  • Hardware operation times and fidelities = T2*=20us; single-qubit/shuttle 100ns; two-qubit 150ns; measurement 5us; fidelities 99.99%/99.90%
    Taken from cited experiments as optimistic values (Section II F); these directly enter the ESP and noise models, so architecture rankings depend on them.
  • Two-qubit to single-qubit error ratio = 10x
    Assumed pd2=10 pd1, pr2=10 pr1, and tau'_2=10 tau'_1 in both error models (Section III A); this ad hoc ratio is not tied to a specific measured device.
  • Crosstalk probability scale = pcross = 10(pr1/(3ξ)) with ξ unspecified
    Introduced in Section III D 1 to model connectivity-dependent crosstalk; ξ is said to account for connectivity differences but its value and functional form are not given, and this model drives the main negative result.
  • Crosstalk error-rate sweep values = pr1 in {0.01, 0.03, 0.05, 0.08}
    Chosen sweep for the crosstalk study (Section III D 1); no experimental calibration is shown for these specific rates.
assumptions (5)
  • standard math Stabilizer formalism and graph-state representation of AME(6,2); Bell operator B(G)=Σ Si with bounds 4≤B≤64.
    Used in Sections II A and III B to score architecture quality; relies on established graph-state properties from the cited literature.
  • domain assumption I3 < 0 indicates a volume-law/QEC phase, I3 > 0 indicates an area-law/classical phase.
    Standard in monitored-circuit literature and applied here without independent validation in this small-circuit setting.
  • domain assumption No gate parallelization and a single readout site at the bottom-left dot.
    Section II F; motivated by crosstalk concerns but simplifies the comparison and may disadvantage certain architectures.
  • ad hoc to paper Crosstalk is more prevalent in more-connected devices, modeled by scaling pcross through ξ.
    Section III D 1; this assumption partly creates the result that connectivity loses its benefit under crosstalk.
  • standard math The [[4,1,2]] surface-code states are 2-uniform and represent maximal four-party entanglement.
    Section II B; code-theoretic fact used to justify the choice of the small surface code as a benchmark.

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Cite this review

Pith. "Pith review of Near-Term Spin-Qubit Architecture Design via Multipartite Maximally-Entangled States." pith.science (2026). https://pith.science/paper/BGKJ6ESQ

@misc{pith2026241212874,
  author       = {Pith},
  title        = {Pith review of: Near-Term Spin-Qubit Architecture Design via Multipartite Maximally-Entangled States},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/BGKJ6ESQ}},
  note         = {Machine review of arXiv:2412.12874}
}
read the original abstract

The design and benchmarking of quantum computer architectures traditionally rely on practical hardware restrictions, such as gate fidelities, control, and cooling. At the theoretical and software levels, numerous approaches have been proposed for benchmarking quantum devices, ranging from, inter alia, quantum volume to randomized benchmarking. In this work, we utilize the quantum information-theoretic properties of multipartite maximally-entangled quantum states, in addition to their correspondence with quantum error correction codes, permitting us to quantify the entanglement generated on near-term bilinear spin-qubit architectures. For this aim, we introduce four metrics which ascertain the quality of genuine multipartite quantum entanglement, along with circuit-level fidelity measures. As part of the task of executing a quantum circuit on a device, we devise simulations which combine expected hardware characteristics of spin-qubit devices with appropriate compilation techniques; we then analyze three different architectural choices of varying lattice sizes for bilinear arrays, under three increasingly realistic noise models. We find that if the use of a compiler is assumed, sparsely-connected spin-qubit lattices can approach comparable values of our metrics to those of the most highly-connected device architecture. Even more surprisingly, by incorporating crosstalk into our last noise model, we find that, as error rates for crosstalk approach realistic values, the benefits of utilizing a bilinear array with advanced connectivity vanish. Our results highlight the limitations of adding local connectivity to near-term spin-qubit devices, and can be readily adapted to other qubit technologies. The framework developed here can be used for analyzing quantum entanglement on a device before fabrication, informing experimentalists on concomitant realistic expectations.

Figures

Figures reproduced from arXiv: 2412.12874 by the authors.

Figure 1
Figure 1. FIG. 1: Generating circuit for the AME(6,2) state. (a) depicts [PITH_FULL_IMAGE:figures/full_fig_p004_1.png] view at source ↗
Figure 2
Figure 2. FIG. 2: A small example of [PITH_FULL_IMAGE:figures/full_fig_p008_2.png] view at source ↗
Figure 3
Figure 3. FIG. 3: Connectivity graphs (CG) of possible spin-qubit [PITH_FULL_IMAGE:figures/full_fig_p008_3.png] view at source ↗
Figures from the paper (8 more)
Figure 4
Figure 4. Figure 4: FIG. 4: Both of the error models used in this work. (a) [PITH_FULL_IMAGE:figures/full_fig_p010_4.png]
Figure 5
Figure 5. Figure 5: FIG. 5: Results for the circuit generating the AME(6,2) state. In blue, green, and red, we have measured: the average Bell [PITH_FULL_IMAGE:figures/full_fig_p012_5.png]
Figure 6
Figure 6. Figure 6: FIG. 6: Finalized logical success rate [PITH_FULL_IMAGE:figures/full_fig_p012_6.png]
Figure 7
Figure 7. Figure 7: FIG. 7: Finalized ESP results for the [PITH_FULL_IMAGE:figures/full_fig_p013_7.png]
Figure 8
Figure 8. Figure 8: FIG. 8: Results from the tensor network simulation of the [PITH_FULL_IMAGE:figures/full_fig_p013_8.png]
Figure 9
Figure 9. Figure 9: FIG. 9: Results from the tensor network simulation of the [PITH_FULL_IMAGE:figures/full_fig_p014_9.png]
Figure 10
Figure 10. Figure 10: FIG. 10: Shuttle counts resulting from compiling the AME(6,2) circuit for each CG, using a range of initial placement [PITH_FULL_IMAGE:figures/full_fig_p016_10.png]
Figure 11
Figure 11. Figure 11: FIG. 11: Success rates for select simulations with Pauli error rates. (a) Architecture with CG [PITH_FULL_IMAGE:figures/full_fig_p024_11.png]

Discussion (0). Continue with ORCID to comment.

Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. A trilinear quantum dot architecture for semiconductor spin qubits

    quant-ph 2025-01 conditional novelty 6.0 of 10

    A trilinear quantum dot layout with a middle shuttling array could give semiconductor spin qubits two-dimensional connectivity while keeping each dot individually wireable.

Reference graph

Works this paper leans on

169 extracted references · 50 canonical work pages · cited by 1 Pith paper

  1. [1]

    Nielsen and I

    M. Nielsen and I. Chuang, Quantum Computation and Quan- tum Information, ISBN 978-1-107-00217-3 (Cambridge Uni- versity Press, Cambridge, UK, 2010)

    2010

  2. [2]

    Enr ´ıquez, I

    M. Enr ´ıquez, I. Wintrowicz, and K. ˙Zyczkowski, Maximally entangled multipartite states: a brief survey, in Journal of Physics: Conference Series , V ol. 698 (IOP Publishing, 2016) p. 012003

    2016

  3. [3]

    G ¨uhne and G

    O. G ¨uhne and G. T ´oth, Entanglement detection, Physics Re- ports 474, 1 (2009)

    2009

  4. [4]

    Bluvstein, H

    D. Bluvstein, H. Levine, G. Semeghini, T. T. Wang, S. Ebadi, M. Kalinowski, A. Keesling, N. Maskara, H. Pichler, M. Greiner, et al. , A quantum processor based on coherent transport of entangled atom arrays, Nature 604, 451 (2022)

    2022

  5. [5]

    S. A. Moses, C. H. Baldwin, M. S. Allman, R. Ancona, L. Ascarrunz, C. Barnes, J. Bartolotta, B. Bjork, P. Blan- chard, M. Bohn, J. G. Bohnet, N. C. Brown, N. Q. Bur- dick, W. C. Burton, S. L. Campbell, J. P. Campora, C. Car- ron, J. Chambers, J. W. Chan, Y . H. Chen, A. Chernogu- zov, E. Chertkov, J. Colina, J. P. Curtis, R. Daniel, M. De- Cross, D. Deen,...

    2023

  6. [6]

    De Smet, Y

    M. De Smet, Y . Matsumoto, A.-M. J. Zwerver, L. Tryputen, S. L. de Snoo, S. V . Amitonov, A. Sammak, N. Samkharadze, ¨O. G ¨ul, R. N. Wasserman, et al. , High-fidelity single-spin shuttling in silicon, arXiv preprint arXiv:2406.07267 (2024)

    arXiv 2024

  7. [7]

    L. R. Schreiber and H. Bluhm, Toward a silicon-based quan- tum computer, Science 359, 393 (2018)

    2018

  8. [8]

    Magesan, J

    E. Magesan, J. M. Gambetta, and J. Emerson, Scalable and robust randomized benchmarking of quantum processes, Phys. Rev. Lett. 106, 180504 (2011)

    2011

Show all 169 references
  1. [9]

    Magesan, J

    E. Magesan, J. M. Gambetta, and J. Emerson, Characterizing quantum gates via randomized benchmarking, Phys. Rev. A 85, 042311 (2012)

    2012

  2. [10]

    S. T. Merkel, J. M. Gambetta, J. A. Smolin, S. Poletto, A. D. C´orcoles, B. R. Johnson, C. A. Ryan, and M. Steffen, Self- consistent quantum process tomography, Phys. Rev. A 87, 062119 (2013)

    2013

  3. [11]

    QuTech Part III Application-based research

    and beSnake [53], as well as the advantage conferred through the usage of shuttling. Our results suggest that for small-scale spin-qubit experiments, more device connectivity does not necessarily guarantee an improvement in the quality of quantum entanglement arising from circ...

  4. [12]

    Paraskevopoulos, F

    N. Paraskevopoulos, F. Sebastiano, C. G. Almudever, and S. Feld, Spinq: Compilation strategies for scalable spin-qubit architectures, ACM Transactions on Quantum Computing 5, 10.1145/3624484 (2023)

    2023 doi

  5. [13]

    Paraskevopoulos, D

    N. Paraskevopoulos, D. Hamel, A. Sarkar, C. G. Almude- ver, and S. Feld, Arta: Automating design space exploration of spin qubit architectures, arXiv preprint arXiv:2407.18151 (2024)

    2024 arXiv

  6. [14]

    Schmid, D

    L. Schmid, D. F. Locher, M. Rispler, S. Blatt, J. Zei- her, M. M ¨uller, and R. Wille, Computational capabilities and compiler development for neutral atom quantum pro- cessors—connecting tool developers and hardware experts, Quantum Science and Technology 9, 033001 (2024)

    2024

  7. [15]

    Nishio, Y

    S. Nishio, Y . Pan, T. Satoh, H. Amano, and R. V . Meter, Ex- tracting success from ibm’s 20-qubit machines using error- aware compilation, ACM Journal on Emerging Technologies in Computing Systems (JETC) 16, 1 (2020)

    2020

  8. [16]

    A. W. Cross, L. S. Bishop, S. Sheldon, P. D. Nation, and J. M. Gambetta, Validating quantum computers using randomized model circuits, Physical Review A 100, 032328 (2019)

    2019

  9. [17]

    A. Wack, H. Paik, A. Javadi-Abhari, P. Jurcevic, I. Faro, J. M. Gambetta, and B. R. Johnson, Quality, speed, and scale: three key attributes to measure the performance of near-term quan- tum computers, arXiv preprint arXiv:2110.14108 (2021)

    2021 arXiv

  10. [18]

    Blume-Kohout and K

    R. Blume-Kohout and K. C. Young, A volumetric framework for quantum computer benchmarks, Quantum 4, 362 (2020)

    2020

  11. [19]

    Arute, K

    F. Arute, K. Arya, R. Babbush, D. Bacon, J. C. Bardin, R. Barends, R. Biswas, S. Boixo, F. G. Brandao, D. A. Buell, et al., Quantum supremacy using a programmable supercon- ducting processor, Nature 574, 505 (2019)

    2019

  12. [20]

    van der Schoot, R

    W. van der Schoot, R. Wezeman, N. M. Neumann, F. Phillip- son, and R. Kooij, Q-score max-clique: The first quantum metric evaluation on multiple computational paradigms, arXiv preprint arXiv:2302.00639 (2023)

    2023 arXiv

  13. [21]

    Bandic, C

    M. Bandic, C. G. Almudever, and S. Feld, Interaction graph- based characterization of quantum benchmarks for improving quantum circuit mapping techniques, Quantum Machine Intel- ligence 5, 40 (2023)

    2023

  14. [22]

    M. A. Steinberg, S. Feld, C. G. Almudever, M. Marthaler, and J.-M. Reiner, Topological-graph dependencies and scal- ing properties of a heuristic qubit-assignment algorithm, IEEE Transactions on Quantum Engineering 3, 1 (2022)

    2022

  15. [23]

    Nielsen, J

    E. Nielsen, J. K. Gamble, K. Rudinger, T. Scholten, K. Young, and R. Blume-Kohout, Gate set tomography, Quantum 5, 557 (2021)

    2021

  16. [24]

    B. Apak, M. Bandic, A. Sarkar, and S. Feld, Ketgpt–dataset augmentation of quantum circuits using transformers, in In- ternational Conference on Computational Science (Springer,

  17. [25]

    Tomesh, P

    T. Tomesh, P. Gokhale, V . Omole, G. S. Ravi, K. N. Smith, J. Viszlai, X.-C. Wu, N. Hardavellas, M. R. Martonosi, and F. T. Chong, Supermarq: A scalable quantum bench- mark suite, in 2022 IEEE International Symposium on High- Performance Computer Architecture (HPCA) (IEEE, 202...

    2022

  18. [26]

    Quetschlich, L

    N. Quetschlich, L. Burgholzer, and R. Wille, Mqt bench: Benchmarking software and design automation tools for quan- tum computing, Quantum 7, 1062 (2023)

    2023

  19. [27]

    Proctor, K

    T. Proctor, K. Young, A. D. Baczewski, and R. Blume- Kohout, Benchmarking quantum computers, arXiv preprint arXiv:2407.08828 (2024)

    2024

  20. [28]

    W. Liu, F. Wang, H. Lin, and J. Shang, A user-centric quantum benchmarking test suite and evaluation framework, Quantum Information Processing 22, 397 (2023)

    2023

  21. [29]

    Lubinski, S

    T. Lubinski, S. Johri, P. Varosy, J. Coleman, L. Zhao, J. Necaise, C. H. Baldwin, K. Mayer, and T. Proctor, Application-oriented performance benchmarks for quantum computing, IEEE Transactions on Quantum Engineering 4, 1 (2023)

    2023

  22. [30]

    Cervera-Lierta, J

    A. Cervera-Lierta, J. I. Latorre, and D. Goyeneche, Quan- tum circuits for maximally entangled states, Phys. Rev. A100, 20 022342 (2019)

    2019

  23. [31]

    Raissi, A

    Z. Raissi, A. Teixid ´o, C. Gogolin, and A. Ac´ın, Constructions of k-uniform and absolutely maximally entangled states be- yond maximum distance codes, Physical Review Research 2, 033411 (2020)

    2020

  24. [32]

    Raissi, C

    Z. Raissi, C. Gogolin, A. Riera, and A. Ac´ın, Optimal quantum error correcting codes from absolutely maximally entangled states, Journal of Physics A: Mathematical and Theoretical51, 075301 (2018)

    2018

  25. [33]

    Huber and M

    F. Huber and M. Grassl, Quantum codes of maximal distance and highly entangled subspaces, Quantum 4, 284 (2020)

    2020

  26. [34]

    Miller, K

    D. Miller, K. Levi, L. Postler, A. Steiner, L. Bittel, G. A. L. White, Y . Tang, E. J. Kuehnke, A. A. Mele, S. Kha- tri, L. Leone, J. Carrasco, C. D. Marciniak, I. Pogorelov, M. Guevara-Bertsch, R. Freund, R. Blatt, P. Schindler, T. Monz, M. Ringbauer, and J. Eisert, Experimen...

    2024 arXiv

  27. [35]

    D. A. Lidar and T. A. Brun, Quantum error correction (Cam- bridge university press, 2013)

    2013

  28. [36]

    Hsiao, P

    T.-K. Hsiao, P. Cova Fari ˜na, S. D. Oosterhout, D. Jirovec, X. Zhang, C. J. van Diepen, W. Lawrie, C.-A. Wang, A. Sam- mak, G. Scappucci, et al., Exciton transport in a germanium quantum dot ladder, Physical Review X 14, 011048 (2024)

    2024

  29. [37]

    Crawford, J

    O. Crawford, J. Cruise, N. Mertig, and M. Gonzalez-Zalba, Compilation and scaling strategies for a silicon quantum pro- cessor with sparse two-dimensional connectivity, npj Quan- tum Information 9, 13 (2023)

    2023

  30. [38]

    Siegel, A

    A. Siegel, A. Strikis, and M. Fogarty, Towards early fault tol- erance on a 2×n array of qubits equipped with shuttling, PRX Quantum 5, 040328 (2024)

    2024

  31. [39]

    Xue, Performance benchmarking of silicon quantum pro- cessors, Ph.D

    X. Xue, Performance benchmarking of silicon quantum pro- cessors, Ph.D. thesis, TU Delft (2022)

    2022

  32. [40]

    ¨Ust¨un, A

    G. ¨Ust¨un, A. Morello, and S. Devitt, Single-step parity check gate set for quantum error correction, Quantum Science and Technology 9, 035037 (2024)

    2024

  33. [41]

    Jones, M

    C. Jones, M. A. Fogarty, A. Morello, M. F. Gyure, A. S. Dzu- rak, and T. D. Ladd, Logical qubit in a linear array of semi- conductor quantum dots, Phys. Rev. X 8, 021058 (2018)

    2018

  34. [42]

    Saraiva and S

    A. Saraiva and S. D. Bartlett, The dawn of error correction with spin qubits, Nature Materials 22, 157 (2023)

    2023

  35. [43]

    Van Riggelen, W

    F. Van Riggelen, W. Lawrie, M. Russ, N. Hendrickx, A. Sam- mak, M. Rispler, B. Terhal, G. Scappucci, and M. Veldhorst, Phase flip code with semiconductor spin qubits, npj Quantum Information 8, 124 (2022)

    2022

  36. [44]

    Het ´enyi and J

    B. Het ´enyi and J. R. Wootton, Tailoring quantum error correc- tion to spin qubits, Physical Review A 109, 032433 (2024)

    2024

  37. [45]

    Takeda, A

    K. Takeda, A. Noiri, T. Nakajima, T. Kobayashi, and S. Tarucha, Quantum error correction with silicon spin qubits, Nature 608, 682 (2022)

    2022

  38. [46]

    Z. Cai, M. A. Fogarty, S. Schaal, S. Patom¨aki, S. C. Benjamin, and J. J. L. Morton, A silicon surface code architecture re- silient against leakage errors, Quantum 3, 212 (2019)

    2019

  39. [47]

    C. D. Hill, M. Usman, and L. C. L. Hollenberg, An exchange- based surface-code quantum computer architecture in silicon (2021), arXiv:2107.11981 [quant-ph]

    2021 arXiv

  40. [48]

    Borras, A

    A. Borras, A. Plastino, J. Batle, C. Zander, M. Casas, and A. Plastino, Multiqubit systems: highly entangled states and entanglement distribution, Journal of Physics A: Mathemati- cal and Theoretical 40, 13407 (2007)

    2007

  41. [49]

    J. F. Marques, B. Varbanov, M. Moreira, H. Ali, N. Muthusub- ramanian, C. Zachariadis, F. Battistel, M. Beekman, N. Haider, W. Vlothuizen, et al., Logical-qubit operations in an error-detecting surface code, Nature Physics 18, 80 (2022)

    2022

  42. [50]

    C. K. Andersen, A. Remm, S. Lazar, S. Krinner, N. Lacroix, G. J. Norris, M. Gabureac, C. Eichler, and A. Wallraff, Re- peated quantum error detection in a surface code, Nature Physics 16, 875 (2020)

    2020

  43. [51]

    Higuchi and A

    A. Higuchi and A. Sudbery, How entangled can two couples get?, Physics Letters A 273, 213 (2000)

    2000

  44. [52]

    Zabalo, M

    A. Zabalo, M. J. Gullans, J. H. Wilson, S. Gopalakrish- nan, D. A. Huse, and J. Pixley, Critical properties of the measurement-induced transition in random quantum circuits, Physical Review B 101, 060301 (2020)

    2020

  45. [53]

    Ippoliti, M

    M. Ippoliti, M. J. Gullans, S. Gopalakrishnan, D. A. Huse, and V . Khemani, Entanglement phase transitions in measurement- only dynamics, Phys. Rev. X 11, 011030 (2021)

    2021

  46. [54]

    Paraskevopoulos, C

    N. Paraskevopoulos, C. G. Almudever, and S. Feld, besnake: A routing algorithm for scalable spin-qubit architectures, IEEE Transactions on Quantum Engineering (2024)

    2024

  47. [55]

    Yoneda, W

    J. Yoneda, W. Huang, M. Feng, C. H. Yang, K. W. Chan, T. Tanttu, W. Gilbert, R. Leon, F. Hudson, K. Itoh, et al., Co- herent spin qubit transport in silicon, Nature communications 12, 4114 (2021)

    2021

  48. [56]

    van Riggelen-Doelman, C.-A

    F. van Riggelen-Doelman, C.-A. Wang, S. L. de Snoo, W. I. Lawrie, N. W. Hendrickx, M. Rimbach-Russ, A. Sammak, G. Scappucci, C. D ´eprez, and M. Veldhorst, Coherent spin qubit shuttling through germanium quantum dots, Nature Communications 15, 5716 (2024)

    2024

  49. [57]

    Struck, M

    T. Struck, M. V olmer, L. Visser, T. Offermann, R. Xue, J.- S. Tu, S. Trellenkamp, Ł. Cywi ´nski, H. Bluhm, and L. R. Schreiber, Spin-EPR-pair separation by conveyor-mode sin- gle electron shuttling in Si/SiGe, Nature Communications 15, 1325 (2024)

    2024

  50. [58]

    Gottesman, Theory of quantum secret sharing, Phys

    D. Gottesman, Theory of quantum secret sharing, Phys. Rev. A 61, 042311 (2000)

    2000

  51. [59]

    Hillery, V

    M. Hillery, V . Bu ˇzek, and A. Berthiaume, Quantum secret sharing, Phys. Rev. A 59, 1829 (1999)

    1999

  52. [60]

    Gottesman, Stabilizer codes and quantum error correction (California Institute of Technology, 1997)

    D. Gottesman, Stabilizer codes and quantum error correction (California Institute of Technology, 1997)

    1997

  53. [61]

    Pastawski, B

    F. Pastawski, B. Yoshida, D. Harlow, and J. Preskill, Holo- graphic quantum error-correcting codes: Toy models for the bulk/boundary correspondence, Journal of High Energy Physics 2015, 1 (2015)

    2015

  54. [62]

    R. J. Harris, N. A. McMahon, G. K. Brennen, and T. M. Stace, Calderbank-shor-steane holographic quantum error-correcting codes, Physical Review A 98, 052301 (2018)

    2018

  55. [63]

    Steinberg, S

    M. Steinberg, S. Feld, and A. Jahn, Holographic codes from hyperinvariant tensor networks, Nature Communications 14, 7314 (2023)

    2023

  56. [64]

    Farrelly, R

    T. Farrelly, R. J. Harris, N. A. McMahon, and T. M. Stace, Tensor-network codes, Physical Review Letters 127, 040507 (2021)

    2021

  57. [65]

    Steinberg, J

    M. Steinberg, J. Fan, R. J. Harris, D. Elkouss, S. Feld, and A. Jahn, Far from perfect: Quantum error correction with (hy- perinvariant) evenbly codes, arXiv preprint arXiv:2407.11926 (2024)

    2024 arXiv

  58. [66]

    M. Hein, J. Eisert, and H. J. Briegel, Multiparty entanglement in graph states, Physical Review A—Atomic, Molecular, and Optical Physics 69, 062311 (2004)

    2004

  59. [67]

    Or ´us, A practical introduction to tensor networks: Matrix product states and projected entangled pair states, Annals of physics 349, 117 (2014)

    R. Or ´us, A practical introduction to tensor networks: Matrix product states and projected entangled pair states, Annals of physics 349, 117 (2014)

    2014

  60. [68]

    Helwig, Absolutely maximally entangled qudit graph states, arXiv preprint arXiv:1306.2879 (2013)

    W. Helwig, Absolutely maximally entangled qudit graph states, arXiv preprint arXiv:1306.2879 (2013)

    2013 arXiv

  61. [69]

    Goyeneche, D

    D. Goyeneche, D. Alsina, J. I. Latorre, A. Riera, and K. ˙Zyczkowski, Absolutely maximally entangled states, com- binatorial designs, and multiunitary matrices, Phys. Rev. A92, 21 032316 (2015)

    2015

  62. [70]

    M. A. Nielsen, Cluster-state quantum computation, Reports on Mathematical Physics 57, 147 (2006)

    2006

  63. [71]

    G ¨uhne, G

    O. G ¨uhne, G. T´oth, P. Hyllus, and H. J. Briegel, Bell inequali- ties for graph states, Phys. Rev. Lett. 95, 120405 (2005)

    2005

  64. [72]

    Huber, O

    F. Huber, O. G¨uhne, and J. Siewert, Absolutely maximally en- tangled states of seven qubits do not exist, Phys. Rev. Lett. 118, 200502 (2017)

    2017

  65. [73]

    Huber, C

    F. Huber, C. Eltschka, J. Siewert, and O. G ¨uhne, Bounds on absolutely maximally entangled states from shadow inequali- ties, and the quantum macwilliams identity, Journal of Physics A: Mathematical and Theoretical 51, 175301 (2018)

    2018

  66. [74]

    D. M. Greenberger, M. A. Horne, and A. Zeilinger, Going be- yond bell’s theorem, in Bell’s theorem, quantum theory and conceptions of the universe (Springer, 1989) pp. 69–72

    1989

  67. [75]

    Raissi, Modifying method of constructing quantum codes from highly entangled states, IEEE Access 8, 222439 (2020)

    Z. Raissi, Modifying method of constructing quantum codes from highly entangled states, IEEE Access 8, 222439 (2020)

    2020

  68. [76]

    A. G. Fowler, M. Mariantoni, J. M. Martinis, and A. N. Cle- land, Surface codes: Towards practical large-scale quantum computation, Physical Review A 86, 032324 (2012)

    2012

  69. [77]

    B. M. Terhal, Quantum error correction for quantum memo- ries, Reviews of Modern Physics 87, 307 (2015)

    2015

  70. [78]

    A. Y . Kitaev, Fault-tolerant quantum computation by anyons, Annals of physics 303, 2 (2003)

    2003

  71. [79]

    S. B. Bravyi and A. Y . Kitaev, Quantum codes on a lattice with boundary, arXiv preprint quant-ph/9811052 (1998)

    1998 arXiv

  72. [80]

    Acharya, L

    R. Acharya, L. Aghababaie-Beni, I. Aleiner, T. I. Andersen, M. Ansmann, F. Arute, K. Arya, A. Asfaw, N. Astrakhantsev, J. Atalaya, et al., Quantum error correction below the surface code threshold, arXiv preprint arXiv:2408.13687 (2024)

    2024 arXiv

  73. [81]

    Asfaw, A

    A. Asfaw, A. Megrant, C. Jones, C. Gidney, D. Bacon, D. De- broy, D. Kafri, E. Lucero, H. Neven, J. Hilton,et al., Suppress- ing quantum errors by scaling a surface code logical qubit, Nature 614, 676 (2023)

    2023

  74. [82]

    Z. Chen, K. J. Satzinger, J. Atalaya, A. N. Korotkov, A. Dunsworth, D. Sank, C. Quintana, M. McEwen, R. Barends, P. V . Klimov, et al., Exponential suppression of bit or phase flip errors with repetitive error correction, arXiv preprint arXiv:2102.06132 (2021)

    2021 arXiv

  75. [83]

    Horsman, A

    D. Horsman, A. G. Fowler, S. Devitt, and R. Van Meter, Sur- face code quantum computing by lattice surgery, New Journal of Physics 14, 123011 (2012)

    2012

  76. [84]

    Bravyi and A

    S. Bravyi and A. Kitaev, Universal quantum computation with ideal clifford gates and noisy ancillas, Phys. Rev. A71, 022316 (2005)

    2005

  77. [85]

    Tomita and K

    Y . Tomita and K. M. Svore, Low-distance surface codes un- der realistic quantum noise, Physical Review A 90, 062320 (2014)

    2014

  78. [86]

    J. P. Bonilla Ataides, D. K. Tuckett, S. D. Bartlett, S. T. Flam- mia, and B. J. Brown, The xzzx surface code, Nature commu- nications 12, 2172 (2021)

    2021

  79. [87]

    Vasmer and D

    M. Vasmer and D. E. Browne, Three-dimensional surface codes: Transversal gates and fault-tolerant architectures, Physical Review A 100, 012312 (2019)

    2019

  80. [88]

    D. K. Tuckett, A. S. Darmawan, C. T. Chubb, S. Bravyi, S. D. Bartlett, and S. T. Flammia, Tailoring surface codes for highly biased noise, Physical Review X 9, 041031 (2019)

    2019

  81. [89]

    Wang, Planar k-uniform states: a generalization of pla- nar maximally entangled states, Quantum Information Pro- cessing 20, 271 (2021)

    Y .-L. Wang, Planar k-uniform states: a generalization of pla- nar maximally entangled states, Quantum Information Pro- cessing 20, 271 (2021)

    2021

  82. [90]

    S. Choi, Y . Bao, X.-L. Qi, and E. Altman, Quantum error correction in scrambling dynamics and measurement-induced phase transition, Physical Review Letters125, 030505 (2020)

    2020

  83. [91]

    Sierant, M

    P. Sierant, M. Schir `o, M. Lewenstein, and X. Turkeshi, Measurement-induced phase transitions in (d+ 1)-dimensional stabilizer circuits, Physical Review B 106, 214316 (2022)

    2022

  84. [92]

    R. Fan, S. Vijay, A. Vishwanath, and Y .-Z. You, Self-organized error correction in random unitary circuits with measurement, Physical Review B 103, 174309 (2021)

    2021

  85. [93]

    Eisert, M

    J. Eisert, M. Cramer, and M. B. Plenio, Colloquium: Area laws for the entanglement entropy, Rev. Mod. Phys.82, 277 (2010)

    2010

  86. [94]

    Y . Li, X. Chen, and M. P. A. Fisher, Measurement-driven en- tanglement transition in hybrid quantum circuits, Phys. Rev. B 100, 134306 (2019)

    2019

  87. [95]

    Skinner, J

    B. Skinner, J. Ruhman, and A. Nahum, Measurement-induced phase transitions in the dynamics of entanglement, Phys. Rev. X 9, 031009 (2019)

    2019

  88. [97]

    Ollivier and W

    H. Ollivier and W. H. Zurek, Quantum discord: a measure of the quantumness of correlations, Physical review letters 88, 017901 (2001)

    2001

  89. [98]

    Vidal and R

    G. Vidal and R. Tarrach, Robustness of entanglement, Physical Review A 59, 141 (1999)

    1999

  90. [99]

    Quetschlich, L

    N. Quetschlich, L. Burgholzer, and R. Wille, Predicting good quantum circuit compilation options, arXiv preprint arXiv:2210.08027 (2022)

    2022 arXiv

  91. [100]

    Helsen, M

    J. Helsen, M. Steudtner, M. Veldhorst, and S. Wehner, Quan- tum error correction in crossbar architectures, Quantum Sci- ence and Technology 3, 035005 (2018)

    2018

  92. [101]

    Murali, J

    P. Murali, J. M. Baker, A. Javadi-Abhari, F. T. Chong, and M. Martonosi, Noise-adaptive compiler mappings for noisy intermediate-scale quantum computers, in Proceedings of the Twenty-Fourth International Conference on Architectural Sup- port for Programming Languages and Opera...

    2019

  93. [102]

    Sarovar, T

    M. Sarovar, T. Proctor, K. Rudinger, K. Young, E. Nielsen, and R. Blume-Kohout, Detecting crosstalk errors in quantum information processors, Quantum 4, 321 (2020)

    2020

  94. [103]

    M. M. Wilde, Quantum information theory (Cambridge uni- versity press, 2013)

    2013

  95. [104]

    Javadi-Abhari, M

    A. Javadi-Abhari, M. Treinish, K. Krsulich, C. J. Wood, J. Lishman, J. Gacon, S. Martiel, P. D. Nation, L. S. Bishop, A. W. Cross, B. R. Johnson, and J. M. Gambetta, Quantum computing with Qiskit (2024), arXiv:2405.08810 [quant-ph]

    2024 arXiv

  96. [105]

    Developers, Cirq (2024)

    C. Developers, Cirq (2024)

    2024

  97. [106]

    R. S. Smith, M. J. Curtis, and W. J. Zeng, A practical quantum instruction set architecture (2016), arXiv:1608.03355 [quant- ph]

    2016 arXiv

  98. [107]

    G. Li, Y . Ding, and Y . Xie, Tackling the qubit mapping problem for nisq-era quantum devices, in Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems (2019) pp. 1001–1014

    2019

  99. [108]

    Steinberg, M

    M. Steinberg, M. Bandi ´c, S. Szkudlarek, C. G. Almudever, A. Sarkar, and S. Feld, Lightcone bounds for quantum circuit mapping via uncomplexity, npj Quantum Information 10, 113 (2024)

    2024

  100. [109]

    Kusyk, S

    J. Kusyk, S. M. Saeed, and M. U. Uyar, Survey on quantum circuit compilation for noisy intermediate-scale quantum com- puters: Artificial intelligence to heuristics, IEEE Transactions on Quantum Engineering 2, 1 (2021)

    2021

  101. [110]

    Khandavilli, I

    S. Khandavilli, I. Palanisamy, M. V . Nguyen, T. V . Le, T. N. Nguyen, and T. N. Dinh, Towards fidelity-optimal qubit map- ping on nisq computers, in 2023 IEEE International Confer- ence on Quantum Computing and Engineering (QCE), V ol. 01 22 (2023) pp. 89–98

    2023

  102. [111]

    Katabarwa, K

    A. Katabarwa, K. Gratsea, A. Caesura, and P. D. Johnson, Early fault-tolerant quantum computing, PRX Quantum 5, 020101 (2024)

    2024

  103. [112]

    Preskill, Quantum computing in the nisq era and beyond, Quantum 2, 79 (2018)

    J. Preskill, Quantum computing in the nisq era and beyond, Quantum 2, 79 (2018)

    2018

  104. [113]

    J. M. Taylor, H.-A. Engel, W. D ¨ur, A. Yacoby, C. M. Mar- cus, P. Zoller, and M. D. Lukin, Fault-tolerant architecture for quantum computation using electrically controlled semicon- ductor spins, Nature Physics 1, 10.1038/nphys174 (2005)

    2005 doi

  105. [114]

    Vandersypen, H

    L. Vandersypen, H. Bluhm, J. Clarke, A. Dzurak, R. Ishihara, A. Morello, D. Reilly, L. Schreiber, and M. Veldhorst, Inter- facing spin qubits in quantum dots and donors—hot, dense, and coherent, npj Quantum Information 3, 1 (2017)

    2017

  106. [115]

    Zwerver, T

    A. Zwerver, T. Kr ¨ahenmann, T. Watson, L. Lampert, H. C. George, R. Pillarisetty, S. Bojarski, P. Amin, S. Amitonov, J. Boter, et al., Qubits made by advanced semiconductor man- ufacturing, Nature Electronics 5, 184 (2022)

    2022

  107. [116]

    Steinacker, N

    P. Steinacker, N. D. Stuyck, W. H. Lim, T. Tanttu, M. Feng, A. Nick, S. Serrano, M. Candido, J. D. Cifuentes, F. E. Hudson, et al. , A 300 mm foundry silicon spin qubit unit cell exceeding 99% fidelity in all operations, arXiv preprint arXiv:2410.15590 (2024)

    2024 arXiv

  108. [117]

    H. C. George, M. T. Madzik, E. M. Henry, A. J. Wagner, M. M. Islam, F. Borjans, E. J. Connors, J. Corrigan, M. Curry, M. K. Harper, et al. , 12-spin-qubit arrays fabricated on a 300 mm semiconductor manufacturing line, arXiv preprint arXiv:2410.16583 (2024)

    2024 arXiv

  109. [118]

    Burkard, T

    G. Burkard, T. D. Ladd, A. Pan, J. M. Nichol, and J. R. Petta, Semiconductor spin qubits, Reviews of Modern Physics 95, 025003 (2023)

    2023

  110. [119]

    Hanson, L

    R. Hanson, L. P. Kouwenhoven, J. R. Petta, S. Tarucha, and L. M. Vandersypen, Spins in few-electron quantum dots, Re- views of modern physics 79, 1217 (2007)

    2007

  111. [120]

    Watson, S

    T. Watson, S. Philips, E. Kawakami, D. Ward, P. Scarlino, M. Veldhorst, D. Savage, M. Lagally, M. Friesen, S. Copper- smith, et al., A programmable two-qubit quantum processor in silicon, nature 555, 633 (2018)

    2018

  112. [121]

    Veldhorst, H

    M. Veldhorst, H. Eenink, C.-H. Yang, and A. S. Dzurak, Sil- icon cmos architecture for a spin-based quantum computer, Nature communications 8, 1 (2017)

    2017

  113. [122]

    R. Li, L. Petit, D. P. Franke, J. P. Dehollain, J. Helsen, M. Steudtner, N. K. Thomas, Z. R. Yoscovits, K. J. Singh, S. Wehner, et al., A crossbar network for silicon quantum dot qubits, Science advances 4, eaar3960 (2018)

    2018

  114. [123]

    C. D. Hill, E. Peretz, S. J. Hile, M. G. House, M. Fuech- sle, S. Rogge, M. Y . Simmons, and L. C. Hollenberg, A sur- face code quantum computer in silicon, Science advances 1, e1500707 (2015)

    2015

  115. [124]

    J. M. Boter, J. P. Dehollain, J. P. Van Dijk, Y . Xu, T. Hensgens, R. Versluis, H. W. Naus, J. S. Clarke, M. Veldhorst, F. Sebas- tiano, et al., Physical Review Applied 18, 024053 (2022)

    2022

  116. [125]

    K ¨unne, A

    M. K ¨unne, A. Willmes, M. Oberl ¨ander, C. Gorjaew, J. D. Teske, H. Bhardwaj, M. Beer, E. Kammerloher, R. Otten, I. Seidler, et al. , The spinbus architecture for scaling spin qubits with electron shuttling, Nature Communications 15, 4977 (2024)

    2024

  117. [126]

    Buonacorsi, Z

    B. Buonacorsi, Z. Cai, E. B. Ramirez, K. S. Willick, S. M. Walker, J. Li, B. D. Shaw, X. Xu, S. C. Benjamin, and J. Baugh, Network architecture for a topological quantum computer in silicon, Quantum Science and Technology 4, 025003 (2019)

    2019

  118. [127]

    Bluhm and L

    H. Bluhm and L. R. Schreiber, Semiconductor spin qubits—a scalable platform for quantum computing?, in 2019 IEEE International Symposium on Circuits and Systems (ISCAS) (IEEE, 2019) pp. 1–5

    2019

  119. [128]

    De Michielis, E

    M. De Michielis, E. Ferraro, E. Prati, L. Hutin, B. Bertrand, E. Charbon, D. J. Ibberson, and M. F. Gonzalez-Zalba, Silicon spin qubits from laboratory to industry, Journal of Physics D: Applied Physics 56, 363001 (2023)

    2023

  120. [129]

    N. P. De Leon, K. M. Itoh, D. Kim, K. K. Mehta, T. E. Northup, H. Paik, B. Palmer, N. Samarth, S. Sangtawesin, and D. W. Steuerman, Materials challenges and opportunities for quantum computing hardware, Science 372, eabb2823 (2021)

    2021

  121. [130]

    D. P. Franke, J. S. Clarke, L. M. Vandersypen, and M. Veld- horst, Rent’s rule and extensibility in quantum computing, Mi- croprocessors and Microsystems 67, 1 (2019)

    2019

  122. [131]

    Paquelet Wuetz, P

    B. Paquelet Wuetz, P. Bavdaz, L. Yeoh, R. Schouten, H. Van Der Does, M. Tiggelman, D. Sabbagh, A. Sammak, C. G. Al- mudever, F. Sebastiano, et al., Multiplexed quantum transport using commercial off-the-shelf cmos at sub-kelvin tempera- tures, npj Quantum Information 6, 1 (2020)

    2020

  123. [132]

    Pauka, K

    S. Pauka, K. Das, R. Kalra, A. Moini, Y . Yang, M. Trainer, A. Bousquet, C. Cantaloube, N. Dick, G. Gardner, et al., A cryogenic interface for controlling many qubits, arXiv preprint arXiv:1912.01299 (2019)

    2019 arXiv

  124. [133]

    L. C. Camenzind, S. Geyer, A. Fuhrer, R. J. Warburton, D. M. Zumbuhl, and A. V . Kuhlmann, A hole spin qubit in a fin field-effect transistor above 4 kelvin, Nature Electronics5, 178 (2022)

    2022

  125. [134]

    N. W. Hendrickx, W. I. Lawrie, M. Russ, F. van Riggelen, S. L. de Snoo, R. N. Schouten, A. Sammak, G. Scappucci, and M. Veldhorst, A four-qubit germanium quantum proces- sor, Nature 591, 580 (2021)

    2021

  126. [135]

    Chatterjee, P

    A. Chatterjee, P. Stevenson, S. De Franceschi, A. Morello, N. P. de Leon, and F. Kuemmeth, Semiconductor qubits in practice, Nature Reviews Physics 3, 157 (2021)

    2021

  127. [136]

    F. A. Zwanenburg, A. S. Dzurak, A. Morello, M. Y . Simmons, L. C. L. Hollenberg, G. Klimeck, S. Rogge, S. N. Copper- smith, and M. A. Eriksson, Silicon quantum electronics, Rev. Mod. Phys. 85, 961 (2013)

    2013

  128. [137]

    Loss and D

    D. Loss and D. P. DiVincenzo, Quantum computation with quantum dots, Phys. Rev. A 57, 120 (1998)

    1998

  129. [138]

    Veldhorst, C

    M. Veldhorst, C. Yang, J. Hwang, W. Huang, J. Dehollain, J. Muhonen, S. Simmons, A. Laucht, F. Hudson, K. M. Itoh, et al. , A two-qubit logic gate in silicon, Nature 526, 410 (2015)

    2015

  130. [139]

    Zajac, T

    D. Zajac, T. Hazard, X. Mi, K. Wang, and J. R. Petta, A recon- figurable gate architecture for si/sige quantum dots, Applied Physics Letters 106, 223507 (2015)

    2015

  131. [140]

    Yoneda, K

    J. Yoneda, K. Takeda, T. Otsuka, T. Nakajima, M. R. Delbecq, G. Allison, T. Honda, T. Kodera, S. Oda, Y . Hoshi, et al. , A quantum-dot spin qubit with coherence limited by charge noise and fidelity higher than 99.9%, Nature nanotechnology 13, 102 (2018)

    2018

  132. [141]

    van Riggelen-Doelman, C.-A

    F. van Riggelen-Doelman, C.-A. Wang, S. L. de Snoo, W. I. L. Lawrie, N. W. Hendrickx, M. Rimbach-Russ, A. Sammak, G. Scappucci, C. D ´eprez, and M. Veldhorst, Coherent spin qubit shuttling through germanium quantum dots, Nature Communications 15, 10.1038/s41467-024-49358-y (2024)

    2024 doi

  133. [142]

    X. Xue, M. Russ, N. Samkharadze, B. Undseth, A. Sammak, G. Scappucci, and L. M. Vandersypen, Quantum logic with spin qubits crossing the surface code threshold, Nature 601, 343 (2022)

    2022

  134. [143]

    Noiri, K

    A. Noiri, K. Takeda, T. Nakajima, T. Kobayashi, A. Sammak, G. Scappucci, and S. Tarucha, Fast universal quantum gate above the fault-tolerance threshold in silicon, Nature 601, 338 (2022). 23

    2022

  135. [144]

    Takeda, A

    K. Takeda, A. Noiri, T. Nakajima, L. C. Camenzind, T. Kobayashi, A. Sammak, G. Scappucci, and S. Tarucha, Rapid single-shot parity spin readout in a silicon double quan- tum dot with fidelity exceeding 99%, npj Quantum Informa- tion 10, 10.1038/s41534-024-00813-0 (2024)

    2024 doi

  136. [145]

    S. G. Philips, M. T. Madzik, S. V . Amitonov, S. L. de Snoo, M. Russ, N. Kalhor, C. V olk, W. I. Lawrie, D. Brousse, L. Try- puten, et al., Universal control of a six-qubit quantum proces- sor in silicon, Nature 609, 919 (2022)

    2022

  137. [146]

    Heinz and G

    I. Heinz and G. Burkard, Crosstalk analysis for single-qubit and two-qubit gates in spin qubit arrays, Physical Review B 104, 045420 (2021)

    2021

  138. [147]

    Patom ¨aki, M

    S. Patom ¨aki, M. Gonzalez-Zalba, M. Fogarty, Z. Cai, S. Ben- jamin, and J. Morton, Pipeline quantum processor architec- ture for silicon spin qubits, npj Quantum Information 10, 31 (2024)

    2024

  139. [148]

    Gray, quimb: A python package for quantum information and many-body calculations, Journal of Open Source Software 3, 819 (2018)

    J. Gray, quimb: A python package for quantum information and many-body calculations, Journal of Open Source Software 3, 819 (2018)

    2018

  140. [149]

    Bhatnagar, M

    D. Bhatnagar, M. Steinberg, D. Elkouss, C. G. Almudever, and S. Feld, Low-depth flag-style syndrome extraction for small quantum error-correction codes, in 2023 IEEE International Conference on Quantum Computing and Engineering (QCE), V ol. 1 (IEEE, 2023) pp. 63–69

    2023

  141. [150]

    Chao and B

    R. Chao and B. W. Reichardt, Quantum error correction with only two extra qubits, Physical review letters 121, 050502 (2018)

    2018

  142. [151]

    Chamberland and M

    C. Chamberland and M. E. Beverland, Flag fault-tolerant er- ror correction with arbitrary distance codes, Quantum 2, 53 (2018)

    2018

  143. [152]

    Vittal, A

    S. Vittal, A. Javadi-Abhari, A. W. Cross, L. S. Bishop, and M. Qureshi, Flag proxy networks: Tackling the architectural, scheduling, and decoding obstacles of quantum ldpc codes, arXiv preprint arXiv:2409.14283 (2024)

    2024 arXiv

  144. [153]

    Murali, D

    P. Murali, D. C. McKay, M. Martonosi, and A. Javadi-Abhari, Software mitigation of crosstalk on noisy intermediate-scale quantum computers, in Proceedings of the Twenty-Fifth Inter- national Conference on Architectural Support for Program- ming Languages and Operating Systems ...

    2020

  145. [154]

    Parrado-Rodr´ıguez, C

    P. Parrado-Rodr´ıguez, C. Ryan-Anderson, A. Bermudez, and M. M ¨uller, Crosstalk suppression for fault-tolerant quantum error correction with trapped ions, Quantum 5, 487 (2021)

    2021

  146. [155]

    Behrends, F

    J. Behrends, F. Venn, and B. B ´eri, Surface codes, quantum circuits, and entanglement phases, Phys. Rev. Res. 6, 013137 (2024)

    2024

  147. [156]

    Yu and J

    T. Yu and J. Eberly, Sudden death of entanglement, Science 323, 598 (2009)

    2009

  148. [157]

    X. Feng, Y . Deng, and H. W. J. Bl ¨ote, Percolation transitions in two dimensions, Phys. Rev. E 78, 031136 (2008)

    2008

  149. [158]

    Gray and S

    J. Gray and S. Kourtis, Hyper-optimized tensor network con- traction, Quantum 5, 410 (2021)

    2021

  150. [159]

    Gray and G

    J. Gray and G. K.-L. Chan, Hyperoptimized approximate con- traction of tensor networks with arbitrary geometry, Physical Review X 14, 011009 (2024)

    2024

  151. [160]

    X. Xu, S. C. Benjamin, and X. Yuan, Variational circuit compiler for quantum error correction, Phys. Rev. Appl. 15, 034068 (2021)

    2021

  152. [161]

    T. E. O’Brien, B. Tarasinski, and L. DiCarlo, Density-matrix simulation of small surface codes under current and projected experimental noise, npj Quantum Information 3, 39 (2017)

    2017

  153. [162]

    N. M. Linke, D. Maslov, M. Roetteler, S. Debnath, C. Fig- gatt, K. A. Landsman, K. Wright, and C. Monroe, Experi- mental comparison of two quantum computing architectures, Proceedings of the National Academy of Sciences 114, 3305 (2017)

    2017

  154. [163]

    Jnane, B

    H. Jnane, B. Undseth, Z. Cai, S. C. Benjamin, and B. Koczor, Multicore quantum computing, Phys. Rev. Appl. 18, 044064 (2022)

    2022

  155. [164]

    T. A. Baart, M. Shafiei, T. Fujita, C. Reichl, W. Wegscheider, and L. M. K. Vandersypen, Single-spin ccd, Nature nanotech- nology 11, 330 (2016)

    2016

  156. [165]

    Dijkema, X

    J. Dijkema, X. Xue, P. Harvey-Collard, M. Rimbach-Russ, S. L. de Snoo, G. Zheng, A. Sammak, G. Scappucci, and L. M. Vandersypen, Two-qubit logic between distant spins in silicon, arXiv preprint arXiv:2310.16805 (2023)

    2023 arXiv

  157. [166]

    J. Fan, M. Steinberg, A. Jahn, C. Cao, and S. Feld, Overcom- ing the zero-rate hashing bound with holographic quantum er- ror correction, arXiv preprint arXiv:2408.06232 (2024)

    2024 arXiv

  158. [167]

    J. Old, M. Rispler, and M. M ¨uller, Lift-connected surface codes, Quantum Science and Technology 9, 045012 (2024)

    2024

  159. [168]

    Roffe, D

    J. Roffe, D. R. White, S. Burton, and E. Campbell, Decoding across the quantum low-density parity-check code landscape, Phys. Rev. Res. 2, 043423 (2020)

    2020

  160. [169]

    A. M. Souza, J. Zhang, C. A. Ryan, and R. Laflamme, Ex- perimental magic state distillation for fault-tolerant quantum computing, Nature communications 2, 169 (2011)

    2011

  161. [170]

    P. S. Rodriguez, J. M. Robinson, P. N. Jepsen, Z. He, C. Duck- ering, C. Zhao, K.-H. Wu, J. Campo, K. Bagnall, M. Kwon, et al., Experimental demonstration of logical magic state dis- tillation, arXiv preprint arXiv:2412.15165 (2024). 24 (a) /uni00000014/uni00000015/uni00000016...

    2024

Pith tools

Reviewed August 11, 2026 · model on record in the stance chip above.