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REVIEW 3 major objections 4 minor 21 references

Pauli webs spun by transversal $|Y\rangle$ state initialisation

T0 review · 3 major / 4 minor · reviewed 2026-08-09 · deepseek-v4-flash

Pith's one-line read The paper confirms that the fold-transversal S gate scheme from [4], applied to a rotated surface code with all data qubits initialised in $|+\rangle$, produces a logical $|Y\rangle$ state, and it does so by tracing Pauli webs that map…

desk verdict A clear visual re-derivation of a known logical Y-state scheme, but the load-bearing Pauli web step is asserted rather than proven and the stabilizer check is left to the reader. read the letter →

arxiv 2502.00957 v1 pith:3HG3S6AB submitted 2025-02-02 quant-ph

classification quant-ph
keywords ZX-calculusPauliwebsurfacecodelogicalYstateinitialisationfold-transversalSgaterotatedCliffordcircuitsquantumerrorcorrection
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper aims to confirm that a constant-time, fold-transversal S gate—applied to a rotated surface code whose data qubits are all initialised in $|+\rangle$—produces an encoded logical $|Y\rangle$ state, the Pauli-Y eigenstate that is awkward to prepare transversally on the surface code. To do this, the authors rewrite the gate sequence of [4] as a ZX-diagram and draw Pauli webs through it, showing that a logical $X$ correlator entering the circuit exits as a logical $Y$ correlator. If correct, this gives a diagrammatic, non-probabilistic route to logical $Y$ initialisation on the rotated surface code without elongating the code lattice. The paper is explicitly an extension of an earlier calculation, re-applied to a newer gate construction.

What carries the argument

Pauli webs: a graphical overlay on ZX-diagrams used to track how Pauli operators and logical correlators propagate through a Clifford circuit. Red webs track $X$-type operators, green webs track $Z$-type operators, and the rules of [14] let a web be pushed through spiders, CNOT gates, and CZ gates. The load-bearing move is the colour-changing behaviour at time slice 3: non-local CZ gates folded across the counter-diagonal create a green $Z$ web in the rightmost data column, while the upper-right corner $\pi/2$ Z-spider—a phase gate node in ZX-calculus—generates the overlapping red-and-green web that persists to the output, turning the initial $X$ correlator into a $Y$ correlator. The ZX-diagram is the canvas on which this propagation becomes visible.

What would settle it

Run a stabilizer simulation of the circuit from [4] with every data qubit initialised in $|+\rangle$, conjugate the logical $X$ operator through the full sequence, and check whether the output is the logical $Y$ operator; any other result refutes the claimed $X\to Y$ mapping.

Watch

Extended reading notes

Core claim

The central claim is that the fold-transversal S gate scheme described in [4], when every data qubit is reset to $|+\rangle$, implements a logical S gate on the encoded surface-code qubit; since $S|+\rangle = |Y\rangle$, the final state is a logical $|Y\rangle$ state. The authors support this by translating the full circuit (six time slices) into a ZX-diagram and tracing Pauli webs from input to output. The traced red ($X$-type) web meets the green ($Z$-type) web produced by the non-local CZ gates and the corner $\pi/2$ Z-spider, and the combined web reconstructs the expected logical $Y$ correlator at the output. The paper leaves the stabiliser verification of the final state to the reader, and the verification of the logical $X\to Y$ mapping is the stated main result.

Load-bearing premise

The claim rests on the unproven diagrammatic step at time slice 3 that the non-local controlled-phase gates create a green $Z$-type web in the rightmost data column and the upper-right corner $\pi/2$ Z-spider creates the overlapping red-green web that persists to the output; the authors assert this from the pictures and leave stabiliser verification to the reader.

Editorial extensions

If this is right

  • Logical $|Y\rangle$ states can be prepared on a rotated surface code in a constant number of code cycles by the fold-transversal S gate of [4], with no elongation of the code lattice.
  • The Pauli-web picture provides a graphical confirmation that the logical $X$ correlator is mapped to the logical $Y$ correlator, so error propagation through the fold-transversal gate can be followed visually.
  • The same ZX-diagram treatment extends directly to surface codes of distance greater than 5, as the paper notes.
  • The scheme of [4] is distinguished by non-local two-qubit gates applied separately to data qubits and to syndrome qubits, a feature the paper says earlier fold-transversal schemes lack.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Beyond the paper: if the X-to-Y mapping is correct, the same Pauli-web machinery could be used to verify the full stabilizer group of the output logical state, a check the authors explicitly leave to readers.
  • Beyond the paper: the picture of an input $X$ correlator folding into an overlapping red-green web at a corner $\pi/2$ spider suggests a general template for designing other fold-transversal state-preparation circuits.
  • Beyond the paper: because Pauli-web propagation is rule-based, the verification could be automated for arbitrary code distance and for other diagonal targets such as $S^\dagger|+\rangle$ or magic states.
  • Beyond the paper: the non-local data-syndrome CZ interactions should produce a characteristic syndrome signature under X or Z errors, which a decoder comparison test could quantify.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 4 minor

Summary. This short paper applies ZX-calculus and Pauli webs to the CCLP fold-transversal S gate construction from [4] for the rotated surface code. The authors initialize all data qubits in |+>, draw the circuit in time-sliced ZX diagrams, and attempt to show, via Pauli webs, that a logical X correlator maps to a logical Y correlator. They conclude that this 'effectively initialises a logical surface code |Y⟩ state fold-transversally', while explicitly leaving stabilizer verification to the reader.

Significance. If fully substantiated, the paper would provide a compact diagrammatic illustration of a known logical gate implementation, potentially useful as a pedagogical bridge between ZX-calculus/Pauli-web methods and surface-code transversal operations. The approach is not claimed to be a new protocol, but rather a verification of an existing one; the figures are clear and the connections to the prior literature are explicitly drawn. The main value would be in demonstrating that Pauli webs can reproduce a nontrivial fold-transversal gate action. However, as it stands, the verification is incomplete in ways that are load-bearing for the stated conclusion.

major comments (3)
  1. [Section 4, Figures 11–12] The pivotal Pauli web propagation step is asserted rather than derived: the claim that the non-local CZ gates 'induce the green (Z) Pauli web in the rightmost column of data qubits' and that the upper-right π/2 Z-spider 'generates the red and green overlapping Pauli web' is not supported by an explicit application of the Pauli web rules from [14]. Because the figures omit vertical wires entering and exiting spiders (as admitted in the caption of Figure 12), the reader cannot reproduce the webs' propagation through the CNOT and CZ layers from the text alone.
  2. [Section 5] The conclusion that the scheme 'effectively initialises a logical surface code |Y⟩ state fold-transversally' goes beyond what the paper verifies. An X→Y correlator transformation is a necessary condition, but the logical-state claim also requires the full circuit to preserve the surface-code stabilizer group (up to the appropriate Pauli frame) and that the syndrome readouts do not introduce an uncorrected frame error. The sentence 'We will leave the Pauli web verifications of the stabilisers to the readers' explicitly delegates this essential check, so the stated logical-state conclusion is not established by the presented argument.
  3. [Section 4, generally] The derivation does not specify which rules from [14] are used at each step, nor does it show the intermediate spider decompositions or local complementations that would justify the color-changing behavior of CZ and the effect of the π/2 spider. Without these details, the diagrammatic argument is not independently checkable, which undermines the paper's claimed status as a verification of the CCLP scheme.
minor comments (4)
  1. [Figure 12 caption] The phrase 'Vertical wires in and out of the (normal to the gray planes) spiders in time are omitted' is unclear; please define what the 'gray planes' are and how the omission affects the interpretation of the diagram.
  2. [Figure 11 caption] There is a typo: 'contruction' should be 'construction'.
  3. [Section 3] The sentence 'For illustration purposes, all the rotated surface code will be drawn to distance d = 5' would read more smoothly as 'all rotated surface codes will be drawn at distance d = 5'.
  4. [Section 4, paragraph 3] The phrase 'the contruction of the logicalY correlator' appears in the caption of Figure 11; besides the typo, the sentence would be clearer if the web colors were explicitly identified with the operator labels used in the main text.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the Pauli web derivation is a graphical computation from an external circuit, not a fitted or renamed version of its own conclusion.

full rationale

The paper's claimed derivation is the propagation of an input logical X correlator through the CCLP fold-transversal S gate circuit [4], using Pauli web rules from external references [13,14]. The target statement (X maps to Y) is not used as an input: the red and green webs are read off from the ZX diagrams and the colour-changing CZ gates, and the overlapping red/green web at the output is the conclusion of the calculation, not a fitted parameter. The circuit itself is taken from an external paper [4], and the logical Y state result was independently established there; the present paper is a re-derivation in ZX-calculus/Pauli web language. The only self-reference is to the authors' prior work [17], cited as the source of the same calculational technique and of the TikZ figures, not as the authority for the X-to-Y mapping. The steps left to the reader (stabilizer verification and some details of web propagation through omitted vertical wires) are incompleteness or correctness risks, not circularity: there is no step in which the paper defines the output into the input, fits a parameter to a target, or imports a uniqueness claim from its own earlier work. Therefore the derivation chain is not circular, and the score is 0.

Assumptions & free parameters 0 free parameters · 4 assumptions · 0 invented entities

The paper introduces no free parameters or invented entities. It relies on established mathematical frameworks (ZX-calculus, Pauli webs) and on the correctness of the circuit from [4]. The main unstated premise is that visual Pauli web propagation is a valid proof method for verifying logical correlators.

assumptions (4)
  • domain assumption ZX-calculus rewrite rules correctly represent quantum circuits and their logical operators.
    The paper relies on standard ZX-calculus rules from [12,16] to draw and manipulate the circuit diagrams (Section 2).
  • domain assumption Pauli web construction rules from [13,14] correctly track logical correlators through Clifford ZX-diagrams.
    The main verification in Section 4 uses Pauli web rules from the cited literature to propagate the logical X and Z correlators.
  • domain assumption The graphical transcription of the CCLP fold-transversal S gate circuit from [4] is faithful.
    The paper states it takes the circuit from [4] FIG. S1(b) and modifies the input states, but does not re-derive the circuit.
  • domain assumption Surface code stabilizers and logical operators are as described in [5].
    The surface code encoder and logical correlators in Section 2 rely on standard surface code theory.

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Cite this review

Pith. "Pith review of Pauli webs spun by transversal $|Y\rangle$ state initialisation." pith.science (2026). https://pith.science/paper/3HG3S6AB

@misc{pith2026250200957,
  author       = {Pith},
  title        = {Pith review of: Pauli webs spun by transversal $|Y\rangle$ state initialisation},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/3HG3S6AB}},
  note         = {Machine review of arXiv:2502.00957}
}
abstract

Originally motivated by the (fold-)transversal related initialisation of logical surface code $|Y\rangle$ states from [arXiv:1603.02286, arXiv:2302.07395, arXiv:2302.12292], which was then explicitly extended to the fold-transversal $S$ gate implementation in [arXiv:2412.01391] for the rotated surface code, we employ ZX-calculus and Pauli web to understand the $|Y\rangle=S|+\rangle$ state transversal initialisation scheme.

Figures

Figures reproduced from arXiv: 2502.00957 by the authors.

Figure 1
Figure 1. A distance d = 5 rotated surface code with green X-type and red Z-type plaquettes. The larger d 2 gray nodes represents the data qubits whilst the smaller d 2 − 1 black and white nodes are the syndrome qubits initialised in the |0⟩ and |+⟩ states respectively for syndrome extraction. 2 Review on rotated surface code ZX-diagrams The ZX calculus is a useful diagrammatic tool for representing and manipulating quantum s… view at source ↗
Figure 2
Figure 2. Here are some useful gates (CNOT, CZ, Hadamard, [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. A distance d = 5 rotated surface code encoder circuit. This consists of Z-type followed by X-type plaquette parity measurements (for detailed discussion, see [5, 13]). (a) Logical X correlator. (b) Logical Z correlator [PITH_FULL_IMAGE:figures/full_fig_p003_3.png] view at source ↗
Figures from the paper (5 more)
Figure 4
Figure 4. Figure 4: These are the logical X and Z correlators, linking the logical (X and Z respectively) operators of the surface code from the input (bottom legs) to the output (top legs). to top) in figure 4. The logical Z (X) correlator is the green (red) Pauli web in figure 4b (4a) 2…
Figure 9
Figure 9. Figure 9: The red Pauli web drawn for the first two time slice in the CCLP [PITH_FULL_IMAGE:figures/full_fig_p005_9.png]
Figure 10
Figure 10. Figure 10: The red Pauli web drawn up to just before time slice 3. [PITH_FULL_IMAGE:figures/full_fig_p006_10.png]
Figure 11
Figure 11. Figure 11: The Pauli web on time slice 4, where the CZ gates modify the Pauli web colours leading to [PITH_FULL_IMAGE:figures/full_fig_p006_11.png]
Figure 12
Figure 12. Figure 12: The Pauli web for the CCLP’s fold-transversal [PITH_FULL_IMAGE:figures/full_fig_p007_12.png]

Discussion (0). Continue with ORCID to comment.

Reference graph

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Reviewed August 9, 2026 · model on record in the stance chip above.