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The H2M Monolithic Active Pixel Sensor -- characterizing non-uniform in-pixel response in a 65 nm CMOS imaging technology

T0 review · 4 major / 4 minor · reviewed 2026-08-08 · deepseek-v4-flash

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Pith's one-line read The H2M monolithic pixel sensor's response is non-uniform because the analog front-end's n-well perturbs charge collection, an effect that can be mitigated by higher bias and slower feedback.

desk verdict A solid, honest test-beam characterization of a new 65 nm MAPS prototype showing a real in-pixel non-uniformity; the causal mechanism is plausible but deferred to a companion simulation paper. read the letter →

arxiv 2502.06573 v2 pith:PWYFCXCN submitted 2025-02-10 physics.ins-det

Sara Ruiz Daza , Rafael Ballabriga , Eric Buschmann , Michael Campbell , Raimon Casanova Mohr , Dominik Dannheim , Jona Dilg , Ana Dorda
show 23 more authors
Finn King Ono Feyens Philipp Gadow Ingrid-Maria Gregor Karsten Hansen Yajun He Lennart Huth Iraklis Kremastiotis Corentin Lemoine Stefano Maffessanti Larissa Mendes Younes Otarid Christian Reckleben Sébastien Rettie Manuel Alejandro del Rio Viera Judith Schlaadt Adriana Simancas Walter Snoeys Simon Spannagel Tomas Vanat Anastasiia Velyka Gianpiero Vignola H{aa}kan Wennlöf
This is my paper · ORCID
classification physics.ins-det PACS 29.40.Gx
keywords monolithicactivepixelsensor65nmCMOSimagingin-pixelresponsenon-uniformitychargecollectiontestbeamcharacterizationdetectorballisticdeficit
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper reports on the H2M test chip, a monolithic active pixel sensor made in a 65 nm CMOS imaging process with 35 µm square pixels, and shows that the chip's detection efficiency and time of arrival vary strongly with the position of the particle hit inside a pixel. The variation is traced to the n-well of the analog front-end circuit, which sits inside the deep p-well and alters the electric field so that charge released beneath it is collected more slowly. Because the front-end's integration time is only a few nanoseconds, those slower signals lose amplitude to ballistic deficit and can fall below threshold, lowering efficiency in that region. The authors show that raising the sensor bias and lowering the front-end feedback current restores a uniform, high-efficiency response, with 99.6% efficiency measured at a 144-electron threshold. The result matters because it identifies a layout-dependent mechanism that can make large-pitch 65 nm MAPS non-uniform unless the analog well is taken into account in the design.

What carries the argument

The load-bearing object is the n-well of the analog front-end circuitry, a roughly 4 µm wide well containing PMOS transistors inside the deep p-well. The mechanism is that this well distorts the electric field at the p-well / low-dose n-implant interface, creating local potential wells that slow charge collection along paths underneath it. The second essential component is the charge-sensitive amplifier's feedback current $i_{\text{krum}}$: it sets the slope of the CSA output's falling edge, i.e., the integration time. Slow signals lose amplitude because the CSA output starts to discharge before all charge is collected (ballistic deficit), so with a fast feedback the slow signals fall below the discriminator threshold. The 35 µm pitch matters because the lateral field components from neighbouring electrodes are farther apart, making the field more vulnerable to the n-well perturbation.

What would settle it

Build a test structure identical to H2M but with the analog n-well removed or shifted to the pixel edge, and repeat the test beam measurements or a sub-micron laser scan: the slow, inefficient in-pixel region should move with the n-well or disappear entirely. If the drop in efficiency and time of arrival does not track the n-well footprint, the claimed causal mechanism is wrong.

Watch

Extended reading notes

Core claim

The central claim is that the H2M sensor's non-uniform in-pixel response is caused by the analog front-end's n-well. The n-well is about 4 µm wide and hosts the PMOS transistors; it sits inside the deep p-well next to the collection electrode. It perturbs the electric field at the interface between the p-well and the low-dose n-type implant, creating local potential wells that slow charge collection along paths crossing that region. The measured efficiency and time-of-arrival maps show the slow, less-efficient region aligned with this n-well, while the cluster-size map remains symmetric, indicating charge sharing is unchanged. The effect is amplified by the 35 µm pitch and the fast front-end: slow signals are attenuated by ballistic deficit because the feedback current sets a short integration time. The paper presents simulations with generic doping profiles that do not include the wells and that predict a higher, uniform efficiency, so the difference with data is taken as evidence for the well's role; detailed simulations including the analog n-well and the electronics are reported in the companion paper [11]. With a bias of -3.6 V and low feedback current, the efficiency reaches 99.6% at a threshold of 144 electrons.

Load-bearing premise

The argument assumes that the analog n-well—and not some other feature of the pixel layout—is what disturbs the electric field and slows charge collection; the paper's own evidence for this is a spatial correlation, with the detailed proof left to another paper. If the n-well were not the cause, the explanation would collapse even though the measured non-uniformity would remain.

Editorial extensions

If this is right

  • Future 65 nm MAPS designs must account for analog n-well placement and size, since layout-dependent charge-collection non-uniformity emerges once the pixel pitch is large enough.
  • Operating at higher bias voltage and lower feedback current recovers uniform in-pixel efficiency, making that the recommended operating point for high-efficiency applications.
  • Timing performance is position-dependent as well as efficiency: time-of-arrival maps show tens of nanoseconds of variation across a pixel, which would degrade time resolution if left uncorrected.
  • Smaller-pitch prototypes in the same technology do not show this non-uniformity, so the phenomenon is specific to large-pitch designs in this process.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • If the n-well mechanism is general, then moving or shielding the analog n-well, for example placing PMOS devices in wells outside the active pixel area or behind the collection electrode, should eliminate the slow region; this is a testable design change the paper hints at but does not make explicit.
  • The same mechanism implies that per-pixel timing corrections or position-dependent thresholds could be needed for 4D tracking with large-pitch MAPS, even when bias and feedback settings restore efficiency.
  • The ballistic-deficit explanation suggests the effect becomes stronger as the front-end is made faster; future designs targeting high rate capability may need to trade shaping time against the risk of position-dependent inefficiency, a trade-off the paper does not quantify.
  • Sub-micron laser scans of collection time versus n-well position could turn the qualitative spatial correlation into a quantitative map, directly testing the mechanism before detailed simulations are relied upon.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

4 major / 4 minor

Summary. This paper presents the design, commissioning, and test-beam characterization of H2M, a prototype monolithic active pixel sensor in TPSCo 65 nm ISC technology with 35 × 35 µm² pixels and a digital-on-top architecture ported from hybrid pixel readout. The paper reports agreement of measured single-pixel noise and threshold dispersion with front-end simulations, efficiency/fake-hit curves versus threshold for three bias voltages and two feedback-current settings, and in-pixel maps of efficiency, time-of-arrival, and cluster size obtained by projecting tracks into four pixels. The main reported result is a strongly non-uniform in-pixel response: efficiency and timing degrade asymmetrically toward pixel edges and corners, with the deficit aligned with the analog front-end n-well. The authors attribute this response to potential wells that slow charge collection and to ballistic deficit in the fast front end, noting that detailed simulations are provided in a companion paper [11].

Significance. The empirical beam-test data are useful and timely: they document, for the first time, a clear layout-induced in-pixel non-uniformity in this 65 nm imaging process at 35 µm pitch, and they show an operating regime (high reverse bias, low ikrum, threshold 144 e−, efficiency 99.6%) where the effect is mitigated. The noise and threshold-dispersion results, together with the bias and ikrum dependence, are concrete inputs for future MAPS submissions. The main limitation is that the causal mechanism—the analog n-well as the source of the efficiency/timing deficit—is not demonstrated inside the paper; the quantitative simulations are deferred to [11]. If the mechanism is confirmed there, this will be an important design lesson; the measured non-uniformity remains a robust empirical result regardless.

major comments (4)
  1. [§3, Fig. 3] The efficiency and ToA maps in Fig. 3 are the central evidence for the claimed non-uniformity, but no statistical uncertainty, bin occupancy, or track-count maps are reported. Particularly at the edges and corners, where the efficiency drops below 0.8, the deficit could in part reflect low per-bin statistics. Please add uncertainty maps or per-bin track counts and, if the deficit persists, state the significance of the drop.
  2. [§3, after Fig. 3] The causal statement that the efficiency/timing deficit is produced by the 4 µm-wide analog n-well, through local potential wells at the p-well / low-dose n-implant interface, is supported only by a qualitative overlay of the drawn layout (Fig. 1) with the measured maps. Alternative layout features (the low-dose n-implant gap at pixel boundaries, offset of the collection electrode, and the digital n-wells) are not quantitatively excluded, and the TCAD/Allpix2 simulations with the n-well and electronics are only referenced as [11]. Since this mechanism is the main forward-looking conclusion, the paper should present at least one key simulation result (e.g., simulated efficiency/ToA map with and without the analog n-well) or explicitly label the mechanism as a hypothesis pending [11].
  3. [§3, efficiency statement] The statement that 'at low hit detection thresholds (<180 electrons) and larger bias voltages, the in-pixel response remains uniform' with 99.6 % efficiency at 144 e− and -3.6 V is not accompanied by an in-pixel map at -3.6 V or by a statistical uncertainty for the 99.6 % value. Please show the map (or quantify the residual non-uniformity) and report the number of tracks, to support the claimed uniformity.
  4. [§3, Fig. 2a] In Fig. 2a, the Allpix2 simulation with generic profiles is compared to data without an uncertainty band or description of threshold-conversion and model uncertainties; the observed data/simulation difference is then attributed to in-pixel non-uniformity. Reporting the simulated efficiency with statistical and systematic uncertainties would make the discrepancy argument quantitative rather than qualitative.
minor comments (4)
  1. [Fig. 3] The axis labels in Fig. 3 appear as 'in-pixel xtrack [ m]' and 'in-pixel ytrack [ m]'; the micrometer symbol is missing and should be typeset as µm.
  2. [Fig. 2b] The two ikrum settings are labeled only 'low' and 'high'; give the exact current or DAC values and, if available, the corresponding CSA integration time.
  3. [Fig. 2a caption] The simulated efficiency curve at -3.6 V would benefit from a caption statement of the simulation conditions (sensor thickness, collection electrode geometry, bias voltage, and whether any well structure is included) to make the comparison reproducible.
  4. [§3, Fig. 3c] The cluster-size map is described as symmetric, but no quantitative symmetry measure is provided; a simple asymmetry metric would strengthen the claim.

Circularity Check

0 steps flagged · score 1.0 of 10

No significant circularity: the measured in-pixel non-uniformity is a self-contained empirical result, and the n-well mechanism is deferred to an external companion simulation rather than being derived from the fitted inputs.

full rationale

The paper's central empirical claim is the measured non-uniform in-pixel efficiency and time-of-arrival maps (Fig. 3). These maps are direct test-beam data products, not outputs of a fit and not constructed from the stated cause. The comparison with Allpix2 simulations using generic profiles is used to expose a discrepancy ("The difference between the measured and simulated efficiency can be explained by a non-uniformity in the in-pixel response"), not to tune a parameter that is later called a prediction. The causal attribution to the analog n-well is explicitly presented as a correlation ("has been correlated with the size and location of the n-wells of the analog circuitry") and the quantitative support is referred to a companion paper: "Those studies are summarized in [11]." This citation is self-referential in the sense of overlapping authorship, but it is not circular: the present paper's measured maps are independent of the companion simulation, and the companion simulation is an external, falsifiable modeling effort that does not take the H2M measured maps as an input. Even if the companion simulation were incorrect, the observed non-uniformity would remain; only the mechanistic explanation would fail. That is a completeness or verification concern, not a circular-derivation concern. No equation in this paper is defined in terms of the result it claims to explain, and no fitted value is renamed as a prediction. Therefore the circularity burden is minimal; the score reflects only the minor self-citation used to support the causal mechanism, not a reduction of the central claim to its inputs.

Assumptions & free parameters 0 free parameters · 4 assumptions · 0 invented entities

The paper introduces no fitted free parameters. It relies on standard detector and simulation assumptions, plus the companion simulation [11] for the causal mechanism.

assumptions (4)
  • domain assumption The TPSCo 65 nm ISC process modifications (low-dose n-type implant with a gap at pixel boundaries) produce the intended electric field configuration in the sensitive layer.
    Invoked in Section 2 when describing the sensor layout and in Section 3 when interpreting electric field perturbations caused by n-wells.
  • domain assumption The ADENIUM telescope track reconstruction and the projection of track intercepts onto the sensor yield accurate in-pixel hit positions without systematic distortion.
    Section 3 builds the in-pixel maps by projecting track intercepts into four pixels; if alignment is biased, the correlation between the efficiency drop and the n-well location could be an artifact.
  • domain assumption The companion simulation study [11], which includes the analog n-well and front-end electronics, correctly reproduces the measured non-uniformity and validates the causal mechanism.
    Section 3 states that the detailed simulations are summarized in [11]; the causal explanation in this paper relies on that external result.
  • domain assumption The ballistic deficit model, in which a slow charge signal loses amplitude when the CSA response time is fast, explains the observed efficiency loss for slow in-pixel signals.
    Used in Section 3 and figure 4 to explain why low ikrum improves efficiency.

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Cite this review

Pith. "Pith review of The H2M Monolithic Active Pixel Sensor -- characterizing non-uniform in-pixel response in a 65 nm CMOS imaging technology." pith.science (2026). https://pith.science/paper/PWYFCXCN

@misc{pith2026250206573,
  author       = {Pith},
  title        = {Pith review of: The H2M Monolithic Active Pixel Sensor -- characterizing non-uniform in-pixel response in a 65 nm CMOS imaging technology},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/PWYFCXCN}},
  note         = {Machine review of arXiv:2502.06573}
}
abstract

The high energy physics community recently gained access to the TPSCo 65 nm ISC (Image Sensor CMOS), which enables a higher in-pixel logic density in monolithic active pixel sensors (MAPS) compared to processes with larger feature sizes. To explore this novel technology, the Hybrid-to-Monolithic (H2M) test chip has been designed and manufactured. The design followed a digital-on-top design workflow and ports a hybrid pixel-detector architecture, with digital pulse processing in each pixel, into a monolithic chip. The chip matrix consists of 64$\times$16 square pixels with a size of 35$\times$35 um2, and a total active area of approximately 1.25 um2. The chip has been successfully integrated into the Caribou DAQ system. It is fully functional, and the measured threshold dispersion and noise agree with the expectation from front-end simulations. However, a non-uniform in-pixel response related to the size and location of the n-wells in the analog circuitry has been observed in test beam measurements and will be discussed in this contribution. This asymmetry in the pixel response, enhanced by the 35 um pixel pitch - larger than in other prototypes - and certain features of the readout circuit, has not been observed in prototypes with smaller pixel pitches in this technology.

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Forward citations

Cited by 1 Pith paper

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Reference graph

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Reviewed August 8, 2026 · model on record in the stance chip above.