Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links, observed 2026-08-06T21:51:27.771834Z
Paper Citation Record · LEDGER
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms
As of 17 August 2026, this Paper Citation Record lists 11 of 11 outbound references and 1 inbound Pith citation observation for arXiv:2506.23405.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-17T06:30:58.91139+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-05T21:36:24.993295Z
A source-named dated measurement, never combined with another source.
Source: pith, observed 2026-08-10T05:30:23.456663Z
Reference resolution
11 of 11 outbound references displayed
- verified exact0
- verified fuzzy7
- unresolved3
- parse uncertain0
- malformed identifier0
- metadata mismatch1
External citation measurements
0
pith, observed 2026-08-10T05:30:23.456663Z
Outbound references
Observation 0ec4123c-4152-4e1f-8b8d-31d43500e091 · outbound
This paper cites 5), we employ a precise quantitative study that utilizes finite-element physical models, SPICE simulation, and cycle-accurate GPU simulation.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms 5), we employ a precise quantitative study that utilizes finite-element physical models, SPICE simulation, and cycle-accurate GPU simulation
Reference 3
- Resolution
- verified fuzzy
- raw_fallback, observed 2026-08-06T21:51:29.635360Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.
Observation db862831-ec39-4ad9-b704-37db8e992f81 · outbound
This paper cites functional.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms functional
Reference 4
- Resolution
- verified fuzzy
- raw_fallback, observed 2026-08-06T21:51:29.473449Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.
Observation 504a42b6-399a-45d1-85b5-e28abbd0d2cb · outbound
This paper cites an unresolved cited work.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms Unresolved cited work
Reference 5
- Resolution
- unresolved
- raw_fallback, observed 2026-08-06T21:51:29.250102Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.
Observation c467ae3f-146b-416c-9780-564ee03be150 · outbound
This paper cites We model the baseline system after a verified NVIDIA Ampere RTX 3070 GPU model [20], with system Fig.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms We model the baseline system after a verified NVIDIA Ampere RTX 3070 GPU model [20], with system Fig
Reference 6
- Resolution
- verified fuzzy
- raw_fallback, observed 2026-08-06T21:51:29.091611Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.
Observation 8f8fa200-c39a-475e-a31a-9c1b57bde499 · outbound
This paper cites 16, we track total performance (instructions per cycle, IPC), application runtime, and performance per watt for each benchmark and its geometric mean.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms 16, we track total performance (instructions per cycle, IPC), application runtime, and performance per watt for each benchmark and its geometric mean
Reference 7
- Resolution
- verified fuzzy
- raw_fallback, observed 2026-08-06T21:51:28.928597Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.
Observation 1bec9786-03a9-4ca4-94d3-8003274122f4 · outbound
This paper cites Magnetic tunnel junction (MTJ) based multi-port racetrack memory [65], STT-MRAM [66]-[68], and SOT-MRAM [69] register files have been the focus of prior GPU system-level studies.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms Magnetic tunnel junction (MTJ) based multi-port racetrack memory [65], STT-MRAM [66]-[68], and SOT-MRAM [69] register files have been the focus of prior GPU system-level studies
Reference 8
- Resolution
- verified fuzzy
- raw_fallback, observed 2026-08-06T21:51:28.727680Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.
Observation b80e318d-0a39-4de6-b566-0f0366825aa8 · outbound
This paper cites NVIDIA Announces Financial Results for First Quarter Fiscal 2025,.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms NVIDIA Announces Financial Results for First Quarter Fiscal 2025,
Reference 9
- Resolution
- verified fuzzy
- raw_fallback, observed 2026-08-06T21:51:28.444211Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.
Observation 23b66caf-26f6-4d7f-8e1b-3ef7ddfb5bec · outbound
This paper cites Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms Optimization and Benchmarking of Monolithically Stackable Gain Cell Memory for Last-Level Cache
Reference 10
- Resolution
- metadata mismatch
- local_arxiv, observed 2026-08-06T21:51:28.090973Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.
Observation 095b7736-e735-4a83-be58-33854c4005e0 · outbound
This paper cites GainSight: A Unified Framework for Data Lifetime Profiling and Heterogeneous Memory Composition.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms GainSight: A Unified Framework for Data Lifetime Profiling and Heterogeneous Memory Composition
Reference 29
- Resolution
- unresolved
- no resolver link, observed 2026-08-06T21:51:27.567383Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation a9585574-6851-4cc8-b0eb-c3de1b8d64ce · outbound
This paper cites A Comprehensive Overview of Large Language Models.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms A Comprehensive Overview of Large Language Models
Reference 50
- Resolution
- unresolved
- no resolver link, observed 2026-08-06T21:51:27.685127Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 58b53191-7472-4a19-b5ac-24cda818f94a · outbound
This paper cites Advanced hybrid MRAM-based novel GPU cache system for graphic processing with high efficiency,.
CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms Advanced hybrid MRAM-based novel GPU cache system for graphic processing with high efficiency,
Reference 73
- Resolution
- verified fuzzy
- raw_fallback, observed 2026-08-06T21:51:28.270577Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.
Pith citing papers
Observation 089691a3-5ddb-47da-9315-a00db09fd2eb · inbound
Architecting Long-Context LLM Acceleration with Packing-Prefetch Scheduler and Ultra-Large Capacity On-Chip Memories cites this paper.
Architecting Long-Context LLM Acceleration with Packing-Prefetch Scheduler and Ultra-Large Capacity On-Chip Memories CMOS+X: Stacking Persistent Embedded Memories based on Oxide Transistors upon GPGPU Platforms
Reference 4
- Resolution
- verified exact
- local_arxiv, observed 2026-08-05T21:36:26.158866Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-17T06:30:58.91139+00:00.