Paper Citation Record · LEDGER

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses

As of 19 August 2026, this Paper Citation Record lists 17 of 17 outbound references and 1 inbound Pith citation observation for arXiv:2606.22594.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2606.22594 v1

Coverage vector

measured 17 of 17 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-06-26T10:06:04.795745Z

measured 18 of 18 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-18T06:34:40.430872+00:00

measured 1 of 1 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-16T00:35:18.079997Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: pith, observed 2026-08-16T00:35:19.176307Z

Reference resolution

17 of 17 outbound references displayed

verified exact0
verified fuzzy0
unresolved17
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation c4ac02ff-331d-423e-a077-4c20cd88201a · outbound

This paper cites an unresolved cited work.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Unresolved cited work

Reference 1

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 69ca175d-5103-4c4e-bb64-4859e1d5cfc8 · outbound

This paper cites Similarly, for each primitive errore Z ∈f Z, PZ ◦S f(eZ) =e Z.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Similarly, for each primitive errore Z ∈f Z, PZ ◦S f(eZ) =e Z

Reference 2

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ece390a0-3871-4d95-9e91-84bc6c5b53af · outbound

This paper cites For everygX ⊂ fX,κ,S f(gX)⊂f κ.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses For everygX ⊂ fX,κ,S f(gX)⊂f κ

Reference 3

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 423cb46d-1c68-4581-872a-70498d8ce870 · outbound

This paper cites For everyg Z ⊂ fZ,κ,S f(gZ)⊂f κ.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses For everyg Z ⊂ fZ,κ,S f(gZ)⊂f κ

Reference 4

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 76107a6c-bc8d-498e-af1e-4f9c1546937e · outbound

This paper cites an unresolved cited work.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Unresolved cited work

Reference 5

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 33d22408-0fe2-4d8f-b428-43c00d8b078a · outbound

This paper cites Every error configuration inF g has a weight at leastd0|g|/2.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Every error configuration inF g has a weight at leastd0|g|/2

Reference 6

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation b80f9926-e385-4996-b573-157fe8df9ffe · outbound

This paper cites Then, we can simply upper bound the size of any receptive zone byzmax.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Then, we can simply upper bound the size of any receptive zone byzmax

Reference 7

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 7b866464-2010-4673-a929-e6bb1e530a49 · outbound

This paper cites an unresolved cited work.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Unresolved cited work

Reference 8

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 762f98bd-c4eb-407c-a36e-c67fc3ba0700 · outbound

This paper cites Every level-1 layer has at mostd1 control qubits.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Every level-1 layer has at mostd1 control qubits

Reference 9

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9cc90c5f-c0a7-4707-a36a-1deb3986da57 · outbound

This paper cites an unresolved cited work.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Unresolved cited work

Reference 10

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 87c856de-79ee-4d36-9139-c450093bfc8d · outbound

This paper cites Every level-1 layer has at mostd 1 target qubits.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Every level-1 layer has at mostd 1 target qubits

Reference 11

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation e654c276-ac2a-4df6-8aa2-cbe93b3ed4c4 · outbound

This paper cites We now describe the level-0 implementation of anH- transformed readout gadget.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses We now describe the level-0 implementation of anH- transformed readout gadget

Reference 12

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 234da7b5-efd7-4ef6-b335-5ef9507c3ca8 · outbound

This paper cites an unresolved cited work.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses Unresolved cited work

Reference 13

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9dc5b2cf-7108-456b-bc49-47cda11f2e92 · outbound

This paper cites The level-0 implementation of anHS-transformed read- out gadget mostly follows from that of anH-transformed readout gadget.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses The level-0 implementation of anHS-transformed read- out gadget mostly follows from that of anH-transformed readout gadget

Reference 14

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 61442910-8c78-498b-bf14-c27b7d9d6cf6 · outbound

This paper cites whereaandbare non-negative fitting parameters.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses whereaandbare non-negative fitting parameters

Reference 15

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 204f8486-29d6-4d4d-9fc2-ef3fa5efdd4c · outbound

This paper cites The HLP is run as a memory for ten level-1 SE rounds.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses The HLP is run as a memory for ten level-1 SE rounds

Reference 16

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0dce1932-5eed-425c-936d-ee8f73c7d606 · outbound

This paper cites We simulate only five level-1 SE rounds on the HLP, since circuit-level simulation is costly at this scale.

Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses We simulate only five level-1 SE rounds on the HLP, since circuit-level simulation is costly at this scale

Reference 17

Resolution: unresolved; no resolver link, observed 2026-06-26T10:06:04.795745Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Pith citing papers

Observation cdad69e9-1b8b-4c7d-9e59-c2c419c9f840 · inbound

Do Not Let CNOTs Overwhelm the Decoder: Scheduling Transversal Gates for Fast FTQC cites this paper.

Do Not Let CNOTs Overwhelm the Decoder: Scheduling Transversal Gates for Fast FTQC Hierarchical Logical Processor on the Rotated Surface Code with Shuttle Buses

Reference 16

Resolution: verified exact; local_arxiv, observed 2026-08-16T00:35:19.182185Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-18T06:34:40.430872+00:00.