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REVIEW 2 major objections 6 minor 48 references

Experimental demonstration of the Quantum Fourier Transform on up to 100 qubits using a convolutional compilation strategy

T0 review · 2 major / 6 minor · reviewed 2026-08-08 · deepseek-v4-flash

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Pith's one-line read A new compilation strategy gives the quantum Fourier transform the same two-qubit gate count on linear qubit chains as on fully connected hardware, and the circuit works up to 100 qubits.

desk verdict A genuinely better LNN QFT compilation, but the experimental fidelity claims conflate AQFT truncation error with hardware error. read the letter →

arxiv 2608.05435 v1 pith:BB22R3N5 submitted 2026-08-05 quant-ph

Paul Coote , Michael J. Biercuk , Yuval Baum This is my paper · ORCID
classification quant-ph
keywords QuantumFouriertransformLinearnearestneighborConvolutionalcompilationCXgatecountApproximateQFTIBMPlatformProcessfidelityRoutingoverhead
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper claims that the quantum Fourier transform (QFT) can be compiled onto a linear nearest-neighbor (LNN) qubit topology with exactly the same number of CX gates as an all-to-all architecture: $n^{2}$ - n for n qubits, and $n^{2}$ - n + 2 for a convolutional variant that adds an ancilla. The authors derive this by starting from a known LNN construction, then using a gate identity that lets a √X gate commute through three CX gates, which aligns CX pairs at layer interfaces so they cancel. They further repackage the circuit as a translation-invariant kernel gadget that steps along the register. On IBM quantum hardware, the correct frequency peak remains the most likely measurement outcome up to 100 qubits, with process fidelity estimates of 11.4% at 50 qubits and 1.8% at 80 qubits. If correct, this removes routing overhead for QFT on any connected device and yields the largest QFT executed to date.

What carries the argument

The load-bearing identity is the commutation of a √X gate through a specific configuration of three CX gates (Fig 1d), which, combined with rewriting H = S·√X·S and moving the diagonal S gates outward, aligns CX pairs at layer boundaries so they cancel as CX² = I. The second mechanism is the convolutional kernel: starting from the Low-CX circuit, one ancilla in |0> and an initial SWAP chain reverse the direction of the long CX chain; because the first CX in each SWAP is controlled by |0>, it can be deleted, and adjacent aligned CXs cancel, leaving a translation-invariant gadget of d+2 qubits that increments along the register. This gadget confines most entangling operations to a brief kernel pass, reducing the average number of causally upstream CX gates per qubit wire.

What would settle it

Run the exact truncated AQFT circuits (threshold π/16) on a statevector simulator and compute the ideal probability of the target bitstring for n=50 and n=80. If that probability is substantially below 1, then the Eq (2) fidelity is biased upward as a measure of hardware performance, and the reported 11.4% and 1.8% figures would need to be divided by the ideal probability to separate synthesis error from device error.

Watch

Extended reading notes

Core claim

The central discovery is a compilation of the QFT onto an LNN architecture that exactly matches the CX gate count of an all-to-all architecture. The derivation rewrites each Hadamard as S·√X·S, moves the diagonal S gates to the circuit edges, and pushes each √X leftward through three preceding CX gates using a proven identity; this makes two CX gates that were separated by an H gate adjacent and aligned, so they cancel at every interface between adjacent QFT layers, saving 2n-4 CX gates over the Park-Ahn construction. A further transformation using an ancilla in |0> and an initial SWAP chain reverses the long initial CX chain and compiles it as late as possible, producing the Convolutional QFT/AQFT: a compact kernel gadget spanning d+2 qubits that strides across the register. Experimentally, the mode of the output distribution equals the encoded frequency for every tested circuit up to n=100, and the process fidelity estimator of Eq (2) yields 11.4% at n=50 and 1.8% at n=80 after readout mitigation.

Load-bearing premise

The fidelity calculation assumes the ideal circuit returns the target bitstring with probability exactly 1, yet the tested circuits are approximate QFTs whose noiseless success probability is never reported, so truncation error and hardware error are not separated.

Editorial extensions

If this is right

  • QFT and approximate QFT circuits on any LNN device now cost the same number of CX gates as on an all-to-all device, eliminating routing overhead for this subroutine.
  • For a fixed approximation threshold d, the gate count scales linearly in n (d(2n - d - 1) + 2 for the convolutional AQFT), making larger circuits practical on noisy hardware.
  • The convolutional kernel structure keeps qubits idle outside a brief kernel pass, so dynamical decoupling sequences can protect them from decoherence and crosstalk.
  • The experimental demonstration shows that with 4096 shots per circuit, the correct frequency of a periodic quantum state is identifiable up to 100 qubits, the largest QFT execution reported.
  • The construction is directly compatible with heavy-hex or square-lattice topologies and with grids of code patches in fault-tolerant architectures.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • The same kernel-gadget strategy could likely compile other translation-invariant circuits, such as quantum walks or Trotterized translation-invariant Hamiltonians, onto LNN hardware with similar routing savings.
  • Because the reported fidelities use truncated AQFT circuits, the 11.4% and 1.8% figures probably include synthesis error; a noiseless-simulator baseline would reveal how much headroom remains for hardware improvement.
  • The linear scaling for fixed d suggests the method could scale to several hundred qubits if the local two-qubit error in the kernel stays low enough.
  • The ALAP scheduling that confines gates to the kernel naturally pairs with error-detection or quantum-error-correction patches on a linear lattice, so the compilation may remain useful in fault-tolerant settings.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

2 major / 6 minor

Summary. The paper introduces two LNN compilation strategies for the QFT: a 'Low-CX' compilation using n^2-n CX gates (matching the all-to-all baseline for the full QFT and for AQFTs at any truncation threshold), and a 'Convolutional' variant using one ancilla and two additional CX gates, realized as a translation-invariant kernel gadget. The authors then report experiments on IBM Quantum hardware for AQFT circuits with truncation at rotations of pi/16 and below, claiming process fidelities of 11.4% at 50 qubits and 1.8% at 80 qubits, and that the target bitstring remains the most frequent outcome up to 100 qubits, which they describe as the largest QFT circuit executed to date.

Significance. The compilation derivation is the main strength: it is constructive, parameter-free, and if correct it removes routing overhead entirely for QFT on LNN hardware, giving a CX count that matches all-to-all connectivity. The convolutional form and the kernel-gadget picture are elegant and potentially useful for hardware-aware scheduling. The experimental observation that the target bitstring is the mode outcome at 50-100 qubits is a notable empirical result. However, the quantitative fidelity claims rest on a questionable application of the estimator in Eq. (2) to truncated AQFT circuits, so the headline fidelity numbers and the 'above 1% threshold' claim need support before the paper's central quantitative conclusions can be accepted.

major comments (2)
  1. [Section IV, Eq. (2)] The fidelity estimator in Eq. (2) is applied to circuits that are not the full QFT. The paper states that all executed circuits are AQFTs with rotations of pi/16 and below truncated, and explicitly acknowledges that this 'introduces synthesis error compared to the full QFT unitary definition in Eq. (1)'. For such an AQFT, the ideal probability q_k of observing the full-QFT target bitstring is strictly less than 1 for each random frequency. The estimator in Eq. (2), as used here, is only valid when the ideal success probability of each benchmark circuit is 1; otherwise it conflates AQFT truncation error with hardware noise. The manuscript never reports q_k or a noiseless simulation of the executed AQFT circuits, so the quoted process fidelities of 9.6%/11.4% (n=50) and 1.4%/1.8% (n=80) are not established as process fidelities of the executed unitary relative to its own ideal. Please provide noiseless AQFT success probabilities for the same circuits and either re-estimate the fidelity against the ideal AQFT unitary or explicitly separate the truncation contribution from the hardware contribution.
  2. [Section IV, Figs. 4-5] The claims that 'the success probability remains above the previously articulated ~1% threshold up to 80 qubits' and the abstract's 'process fidelity of 11.4% at 50 qubits, and 1.8% at 80 qubits' inherit the issue in the first major comment. Until the noiseless q_k values are supplied, these quantitative thresholds are unsupported. The mode-bitstring observation, namely that the target is the most frequent outcome in each trial, is a separate and more robust empirical result; it should be presented as the primary evidence for the 100-qubit claim, with the fidelity numbers either corrected or removed from the abstract and conclusion.
minor comments (6)
  1. [Section IV, Eq. (2)] The typeset expression for Fhat is ambiguous: it is not clear whether the factor m/(m-1) multiplies both terms or only the first; please add brackets to display the formula unambiguously.
  2. [Section IV, paragraph on AQFT threshold] The sentence 'The chosen threshold maximizes circuit fidelity in the current benchmarking exercise on the selected device' is an unsubstantiated optimization claim; either provide a small threshold scan or soften the wording to indicate that this threshold was selected empirically.
  3. [Section IV, Figs. 4-5 and Abstract] The paper uses 'process fidelity' to describe the composite 'QFT + measurement' operation and then 'process fidelity of the unitary QFT alone' after readout mitigation; these are different quantities, and the abstract should state explicitly which one is being reported.
  4. [Section V and Fig. 5 caption] At a nominal width of 100 qubits, the executed circuit actually uses 101 physical qubits because of the ancilla. The caption discloses this, but the abstract and conclusion should state explicitly that the claim is for 100 data qubits plus one ancilla.
  5. [Section IV, fidelity estimates] No statistical uncertainties are reported for the fidelity estimates derived from 20 random frequencies and 4096 shots; please provide confidence intervals (for example, by bootstrapping over the 20 trials).
  6. [Fig. 5] The hexadecimal bitstring labels in Fig. 5a and 5b are dense and partially truncated; they are hard to read and should be reformatted or replaced by abbreviated labels with a mapping table.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the LNN QFT compilation is derived from explicit circuit identities with no fitted parameters, and the experimental fidelity claims rely on independent measurement.

full rationale

The core compilation claim (n^2 - n CX on an LNN topology, and the convolutional variant with n^2 - n + 2 CX) is derived transparently in Section III from textbook QFT synthesis, Park and Ahn's LNN layer construction [26], and explicit circuit identities (S synthesis of H, commutation of diagonal S with CP layers, and the sqrt(X)-through-three-CX identity in Fig. 1d). No parameter is fitted to the benchmark data and no step in the derivation assumes the result being established; the CX counts in Table I are summations of gates in the displayed circuits. The experimental pipeline uses the authors' own error-suppression tools (Refs. [18,19]), but these are externally published, independently falsifiable workflows and are not the source of the compilation result. The 'chosen threshold maximizes circuit fidelity' statement (Section IV) is a device-aware tuning choice, and the application of the Eq. (2) estimator from Ref. [38] to truncated AQFT circuits raises a validity concern because the ideal AQFT output is not a computational basis state; however, that is a statistical/correctness issue, not a circular reduction, because the fidelity estimate does not enter the derivation of the compilation and the mode-bitstring observation is reported directly from raw counts. No self-citation chain is load-bearing for the central claim. Therefore no enumerated circularity step is present.

Assumptions & free parameters 2 free parameters · 3 assumptions · 0 invented entities

The central compilation result rests on standard circuit identities and a standard ancilla resource; no new physical entities are introduced. The experimental fidelity claims additionally rest on the unstated assumption that the Bäumer estimator transfers to approximate circuits, and on the chosen truncation threshold and device selection, which are free choices shaping the headline numbers.

free parameters (2)
  • AQFT truncation threshold (kept angles pi/2, pi/4, pi/8; omitted pi/16 and below) = pi/16 cutoff (d=3)
    Chosen to 'maximize circuit fidelity in the current benchmarking exercise on the selected device' (Section IV). The experimental claims, including the 'largest QFT' statement, depend on this choice; a full QFT would have more gates and likely lower fidelity, changing the nature of the demonstration.
  • Number of random frequencies per circuit width = 20
    m=20 in Eq (2); affects the statistical uncertainty of the process fidelity estimate, but not the central compilation claim. The paper does not report confidence intervals for the derived fidelities.
assumptions (3)
  • standard math H = S * sqrt(X) * S up to global phase, and sqrt(X) commutes through the three-CX configuration of Fig 1d
    Stated in Section III A, Fig 1d; assumed without proof. These are standard circuit identities, but the overall 2n-4 gate saving rests on the commutation identity.
  • domain assumption The process fidelity estimator of Eq (2) (from Ref [38]) is unbiased for estimating the fidelity of the implemented channel to the ideal unitary, even when the compiled circuit is an approximate QFT and the ideal success probability on benchmark inputs is less than 1
    The paper applies Eq (2) to AQFT circuits without justifying the extension. The Bäumer estimator was derived for the ideal full QFT, where the ideal success probability is 1; using it for a truncated circuit requires an extra assumption that is not stated or tested.
  • domain assumption Layout selection, dynamical decoupling insertion, and ALAP scheduling do not change the logical unitary of the compiled circuit
    Standard experimental practice in the paper's pipeline (Section IV). The compiled circuit's logical action is assumed to be preserved after transpilation and error suppression; this is normal but not proven in the text.

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Pith. "Pith review of Experimental demonstration of the Quantum Fourier Transform on up to 100 qubits using a convolutional compilation strategy." pith.science (2026). https://pith.science/paper/BB22R3N5

@misc{pith2026260805435,
  author       = {Pith},
  title        = {Pith review of: Experimental demonstration of the Quantum Fourier Transform on up to 100 qubits using a convolutional compilation strategy},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/BB22R3N5}},
  note         = {Machine review of arXiv:2608.05435}
}
abstract

We present and experimentally validate the `Convolutional QFT': a constructive compilation strategy for the Quantum Fourier Transform (QFT) subroutine on a linear nearest neighbor (LNN) qubit topology. We first introduce a novel strategy that compiles the $n$-qubit QFT onto an LNN topology using only $n^2 - n$ $CX$ gates, matching requirements of a direct compilation on an all-to-all architecture. We then derive the convolutional variant used in our experiments, which requires an additional two $CX$ gates in total, and is realized via a compact, translation-invariant kernel circuit gadget that traverses a quantum register. We demonstrate the power of the convolutional compilation strategy on the IBM Quantum Platform by executing QFT benchmarking circuits. We measure a process fidelity of 11.4% at 50 qubits, and 1.8% at 80 qubits. The correct output state remains clearly distinguishable above background noise up to 100 qubits. These results constitute the largest experimental QFT demonstrated on any quantum computing hardware to date.

Figures

Figures reproduced from arXiv: 2608.05435 by the authors.

Figure 1
Figure 1. FIG. 1. Derivation of the Low-CX QFT on an LNN topology. [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. FIG. 2. The AQFT on an LNN topology. Single-qubit gate labels and parameter angles are omitted for visual clarity. [PITH_FULL_IMAGE:figures/full_fig_p004_2.png] view at source ↗
Figure 3
Figure 3. FIG. 3. Derivation of the Convolutional AQFT. Single-qubit gate labels and angles are omitted for visual clarity. [PITH_FULL_IMAGE:figures/full_fig_p005_3.png] view at source ↗
Figures from the paper (2 more)
Figure 4
Figure 4. Figure 4: FIG. 4. Convolutional QFT circuit success probability for circuit widths of 5 to 100 qubits. In each experiment, a periodic [PITH_FULL_IMAGE:figures/full_fig_p006_4.png]
Figure 5
Figure 5. Figure 5: FIG. 5. Experimental demonstration of the Convolutional QFT for 50 and 80 qubits. [PITH_FULL_IMAGE:figures/full_fig_p007_5.png]

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Pith tools

Reviewed August 8, 2026 · model on record in the stance chip above.