Pith. sign in

REVIEW 3 major objections 6 minor 53 references

Threshold Neuron: A Brain-inspired Artificial Neuron for Efficient On-device Inference

T0 review · 3 major / 6 minor · reviewed 2026-08-11 · deepseek-v4-flash

Challenge this review Re-run · record.json Download PDF Read on arXiv ↗ Review JSON

Pith's one-line read A neuron that replaces multiplication with threshold comparison and subtraction can build competitive networks with zero multiplications and roughly 8x lower kernel power.

desk verdict A simple, plausible multiplication-free neuron with credible accuracy results, but the hardware savings ratios are unverified because the conventional baseline is under-specified and the comparator is omitted. read the letter →

arxiv 2412.13902 v2 pith:6CJXO3WD submitted 2024-12-18 cs.LG

Zihao Zheng , Yuanchun Li , Jiayu Chen , Peng Zhou , Xiang Chen , Yunxin Liu This is my paper · ORCID
classification cs.LG
keywords thresholdneuronmultiplication-freeneuralnetworksenergy-efficientinferenceedgeAIFPGAimplementationbrain-inspiredcomputingdesignon-devicedeeplearning
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

The paper asks whether the fundamental neuron, not just the network architecture, can be redesigned for cheaper hardware. It proposes Threshold Neurons, which replace the multiply-accumulate step with a per-input comparison and subtraction: each signal contributes its excess over a learnable threshold, or nothing if it falls below. Networks built entirely from this one neuron type need no normalization, activation, or pooling, and can be trained with ordinary backpropagation. On standard vision and sensing benchmarks the resulting Threshold-Net matches or slightly beats multiplication-light baselines while using zero multiplications. Hardware synthesis and an FPGA prototype put the efficiency claim in concrete terms: roughly 7.5x to 8.2x lower kernel power, 3.9x to 4.3x smaller area, and a 2.5x system-level power saving.

What carries the argument

The load-bearing object is the threshold-and-subtract transfer function $T(x_i, w_i) = x_i - w_i$ when $x_i > w_i$ and $0$ otherwise, together with its positive and negative polarity variants and a random polarity initialization scheme. This function removes multiplication from the forward pass while remaining differentiable almost everywhere (the derivative at $x_i = w_i$ is defined as zero), which lets the network train with standard backpropagation. It also injects inherent nonlinearity and smooths the aggregated output, which the paper uses to justify removing normalization, rectifiers, and pooling, leaving a single unified neuron circuit for hardware implementation.

What would settle it

Synthesize conventional multiply-based neuron kernels and Threshold Neuron kernels at the same bit width, operating frequency, and design effort in the same 28nm process and compare area and power; if the ratio falls well below the reported 7.51x to 8.19x power and 3.89x to 4.33x area savings, the central efficiency claim would not hold. Similarly, deploy a conventional four-layer network on the same PYNQ-Z2 FPGA at the same 50 MHz clock and measure total power and latency; the 2.52x system-level power saving and 1.75x speedup should reproduce or the claim needs revision.

Watch

Extended reading notes

Core claim

The central discovery is that a neuron defined by thresholding and subtraction, rather than weighted multiplication, is sufficient to build competitive neural networks. In the paper's formulation, a positive Threshold Neuron computes $T^+_{\text{pos}}(x_i, w_i) = x_i - w_i$ when $x_i > w_i$ and $0$ otherwise, while a negative Threshold Neuron computes $T^-_{\text{neg}}(x_i, w_i) = -(x_i - w_i)$ under the same condition, with the thresholds $w_i$ treated as learnable weights. Half the neurons are randomly assigned each polarity and the polarity stays fixed during training. Because the threshold comparison already introduces nonlinearity and the clipped-difference aggregation yields smooth outputs, the authors argue that normalization, rectifiers, and pooling can be removed entirely, leaving a single unified neuron type in the network. They report that Threshold-Net achieves state-of-the-art accuracy among multiplication-less baselines on several image and sensing tasks, with zero multiplications and one neuron type, and that a proof-of-concept FPGA implementation delivers 2.52x power savings and 1.75x speedup at the system level.

Load-bearing premise

The headline hardware savings assume that the synthesized conventional-artificial-neuron kernels used for comparison are a fair, matched baseline; the paper does not report bit widths for the TSMC 28nm synthesis and does not describe the conventional FPGA system behind the 2.52x power claim, so if those baselines are not matched the efficiency gains are overstated.

Editorial extensions

If this is right

  • Edge DNN inference could run without any multiplier circuits in the compute path, cutting chip area and power at the kernel level by the reported factors.
  • Because a single circuit prototype serves the entire network, accelerator design, simulation, and verification could shrink to one neuron design instead of separate modules for convolution, normalization, activation, and pooling.
  • Threshold-Net trains with standard backpropagation since the threshold function is differentiable almost everywhere, so existing optimizers and quantization methods apply without surrogate gradients.
  • Threshold-Net layers can be mixed with conventional layers through the paper's Multiplication Injection mechanism, giving a controlled accuracy-versus-efficiency trade-off, including for diffusion models.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Editorial extension: the per-input gating means any signal below its threshold contributes exactly nothing, so a hardware scheduler that detects and skips inactive channels could push energy savings beyond the reported kernel-level figures; the paper does not implement such skipping.
  • Editorial extension: the threshold function resembles an asymmetric ReLU on $(x_i - w_i)$, so tools from subdifferentiable optimization and shrinkage estimation may be useful for analyzing convergence and generalization of Threshold-Net, an analysis the paper does not attempt.
  • Editorial extension: the reported GPU training overhead suggests the efficiency advantage is hardware-specific; on a GPU the model may actually run slower, and the 1.75x FPGA speedup is measured on a small four-layer proof-of-concept network rather than a full-scale ResNet or diffusion model.
Share X Bluesky LinkedIn Reddit HN

Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 6 minor

Summary. The paper proposes Threshold Neurons, which replace the multiply-accumulate operation in conventional artificial neurons with a threshold comparison followed by subtraction, and introduce a learnable polarity (positive/negative) inspired by excitation-inhibition balance. Using these neurons, the authors construct Threshold-Net, a network family that is multiplication-free and, by design, omits normalization, rectifiers, and pooling. The paper reports competitive accuracy on image classification, image generation, and sensing tasks, plus kernel-level synthesis results claiming 7.51--8.19x power and 3.89--4.33x area savings, and an FPGA system-level prototype claiming 2.52x power savings and 1.75x speedup. The main scientific contribution is a simple, hardware-oriented neuron model with a unified circuit prototype.

Significance. If the hardware efficiency claims are sustained, this work would be a useful contribution to edge inference: it offers a principled path to removing multiplication from the dominant layer types while retaining competitive accuracy, and the unification of neuron types could simplify accelerator design. The paper also provides broad empirical validation across classification, generation, and sensing, showing that the proposed neuron is trainable with standard DNN machinery and is compatible with quantization. The forward and backward derivations are mostly straightforward, and the experiments are extensive for a paper of this scope. However, the headline savings depend on a hardware baseline that is not described in sufficient detail, and one backward-propagation equation is inconsistent with the neuron definition; these issues must be addressed before the central claims can be fully verified.

major comments (3)
  1. [Section 5.5 / Section 5.1.4 / Table 1] The kernel-level power and area savings (7.51x--8.19x and 3.89x--4.33x, Figure 10) are computed against a 'conventional artificial neuron' circuit whose bit widths, RTL structure, and synthesis settings are not reported. Table 1 also omits the comparator, which is one of the two operations defining a Threshold Neuron; if the comparator is counted as roughly an adder, Table 1's own per-operation numbers put the per-input area ratio near (488+59)/(59+59+59) = 3.1x and the power ratio near (248+17.7)/(17.7+17.7+17.7) = 5.0x, below the claimed bounds. Please describe both kernels completely, include the comparator in the cost model, report operand bit widths and design effort, and show the per-operation breakdown so the reported ratios can be reproduced from Table 1 and the synthesis results.
  2. [Section 5.6 / Figure 11] The system-level FPGA claims of 2.52x power savings and 1.75x speedup are not verifiable as written: the paper does not describe the conventional baseline system, its quantization and memory architecture, whether it was also implemented on PYNQ-Z2 with the same clock constraint, or how power and latency were measured. Please specify the baseline system, the measurement methodology, and the resource utilization breakdown so that the system-level comparison can be assessed as a fair matched-baseline experiment.
  3. [Section 3.3.2 / Eq. (10)] The derivative for the negative Threshold Neuron is inconsistent with its definition in Eq. (5). T_neg is nonzero only when X > F, and in that region T_neg = -(X-F), so dT_neg/dF = +1; otherwise T_neg = 0 and the derivative is 0. Eq. (10) instead assigns a nonzero derivative on the branch F > X, where T_neg is identically zero. If the implementation follows Eq. (10), the negative neuron receives incorrect gradients; if the implementation uses the correct gradient, the paper should be corrected. This is load-bearing for the claim that Threshold-Net can be trained seamlessly with standard backpropagation.
minor comments (6)
  1. [Section 5.4 / Table 5] The entries 'DASA CNN 85.80', 'OPPORTUNITY CNN 82.88', and 'WISDM CNN 97.46' are missing the percent sign used elsewhere in the table.
  2. [Section 5.3 / Figure 9] The diffusion results are reported only as generated images; please report numeric FID values for the conventional diffusion model, Threshold-Diffusion with 'little MI', and Threshold-Diffusion with 'more MI' so the claim of recovered FID can be quantified.
  3. [Section 3.3.3] The claims that normalization and rectifiers are unnecessary rest on qualitative reasoning about the 'aggregation effect' and 'inherent non-linearity'; since these architectural simplifications are central to the unity of Threshold-Net, an ablation (e.g., Threshold-Net with BatchNorm or with ReLU added back) would substantiate the claim.
  4. [Section 5.2.3] The quantization experiment reports only the weight distribution after quantization and states 'without accuracy loss', but no quantized accuracy numbers are given; please include the accuracy of the quantized Threshold-Net models, and state whether activations were also quantized.
  5. [Section 3.2.1 / Eq. (2)] The text says the input is compared with the threshold 'when the amplitude of Xi is higher than Wi', but the formulas compare Xi and Wi algebraically; please clarify whether the comparison is on signed values or on absolute values, since this affects both the hardware comparator design and the gradient computation.
  6. [Section 3.3.2 / Eqs. (9)-(10)] The expressions contain the term dX/dF, which is identically zero in the standard forward model; writing it explicitly is confusing. Please either set dX/dF = 0 before presenting the derivatives or state clearly that X is independent of F.

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: the hardware savings and accuracy results are empirical measurements, not predictions derived from fitted parameters.

full rationale

The paper's central claims are empirical rather than derived. It defines Threshold Neurons via Eq. (2)-(5) as per-input comparison and subtraction, constructs Threshold-Net by removing normalization, activation, and pooling, trains on standard datasets, and measures kernel-level area and power by synthesizing circuits for both Threshold and conventional kernels (Sec. 5.1.4, 5.5). The reported 7.51x-8.19x power and 3.89x-4.33x area savings are ratios of synthesized results, not quantities fitted from the same data, so there is no fitted-input-called-prediction or self-definitional reduction. The self-citations ([19], [49]) are related-work mentions and are not load-bearing; no uniqueness theorem or ansatz is imported from the authors' prior work. The concerns raised by a skeptical reader - that the conventional baseline is not fully described and that Table 1 omits comparator cost - are legitimate threats to the validity of the efficiency numbers, but they are not circularity: an inflated or unfairly matched baseline would make the result wrong, not true by construction. No step in the derivation chain reduces to its own input.

Assumptions & free parameters 0 free parameters · 4 assumptions · 0 invented entities

No free parameters beyond standard trained network weights are introduced for the central hardware/efficiency claims. The learnable thresholds are model weights fitted by backpropagation, not extra constants used to support a theoretical prediction. The Threshold Neuron is a new computational primitive, not a new physical entity; no new particles, forces, or dimensions are introduced.

assumptions (4)
  • domain assumption Multiplication circuits dominate area and power over addition/subtraction circuits by a large margin.
    Invoked in Section 2.2.1 and Table 1 to justify the motivation. The margin is implementation-dependent and not characterized across bit widths or technologies.
  • ad hoc to paper The aggregation effect of Threshold Neuron outputs is not salient, so normalization is unnecessary.
    Stated in Sections 3.1 and 3.3.3 without formal analysis; the stability of training without normalization is an empirical assumption.
  • ad hoc to paper The threshold mechanism inherently reduces numerical disparities and stabilizes gradients.
    Used in Section 3.1 to justify removing activation functions and normalization; no gradient analysis is provided.
  • standard math Random polarity initialization yields a balanced ~50/50 split of positive and negative neurons for large networks.
    Follows from the law of large numbers for i.i.d. random signs, but the sufficiency of this for training stability is an empirical assumption.

how reviews work

0 comments
Cite this review

Pith. "Pith review of Threshold Neuron: A Brain-inspired Artificial Neuron for Efficient On-device Inference." pith.science (2026). https://pith.science/paper/6CJXO3WD

@misc{pith2026241213902,
  author       = {Pith},
  title        = {Pith review of: Threshold Neuron: A Brain-inspired Artificial Neuron for Efficient On-device Inference},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/6CJXO3WD}},
  note         = {Machine review of arXiv:2412.13902}
}
read the original abstract

Enhancing the computational efficiency of on-device Deep Neural Networks (DNNs) remains a significant challengein mobile and edge computing. As we aim to execute increasingly complex tasks with constrained computational resources, much of the research has focused on compressing neural network structures and optimizing systems. Although many studies have focused on compressing neural network structures and parameters or optimizing underlying systems, there has been limited attention on optimizing the fundamental building blocks of neural networks: the neurons. In this study, we deliberate on a simple but important research question: Can we design artificial neurons that offer greater efficiency than the traditional neuron paradigm? Inspired by the threshold mechanisms and the excitation-inhibition balance observed in biological neurons, we propose a novel artificial neuron model, Threshold Neurons. Using Threshold Neurons, we can construct neural networks similar to those with traditional artificial neurons, while significantly reducing hardware implementation complexity. Our extensive experiments validate the effectiveness of neural networks utilizing Threshold Neurons, achieving substantial power savings of 7.51x to 8.19x and area savings of 3.89x to 4.33x at the kernel level, with minimal loss in precision. Furthermore, FPGA-based implementations of these networks demonstrate 2.52x power savings and 1.75x speed enhancements at the system level. The source code will be made available upon publication.

Figures

Figures reproduced from arXiv: 2412.13902 by the authors.

Figure 1
Figure 1. (a) The common architecture (including weighted-sum layer, normalization layer, pooling layer, and rectifier) of [PITH_FULL_IMAGE:figures/full_fig_p003_1.png] view at source ↗
Figure 2
Figure 2. (a) The threshold mechanism in the neurons of [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. (a) The Model of Conventional Artificial Neu [PITH_FULL_IMAGE:figures/full_fig_p006_3.png] view at source ↗
Figures from the paper (8 more)
Figure 4
Figure 4. Figure 4: Abstraction of Excitation-inhibition Balance in [PITH_FULL_IMAGE:figures/full_fig_p006_4.png]
Figure 5
Figure 5. Figure 5: Implementation of Threshold Neurons and Threshold-Net. we contend that the inherent simplicity of Threshold Neurons offers significant advantages for hardware design. To validate this advantage, we employ an FPGA-based proof-of-concept implementation. In GPU implementa…
Figure 6
Figure 6. Figure 6: Curves of Threshold-Net during Training. [PITH_FULL_IMAGE:figures/full_fig_p010_6.png]
Figure 7
Figure 7. Figure 7: Threshold-Net Weights Distribution after Quan [PITH_FULL_IMAGE:figures/full_fig_p011_7.png]
Figure 9
Figure 9. Figure 9: Images generated by Diffusion and Threshold [PITH_FULL_IMAGE:figures/full_fig_p011_9.png]
Figure 8
Figure 8. Figure 8: Fitting capability of Threshold-Net with MI. [PITH_FULL_IMAGE:figures/full_fig_p011_8.png]
Figure 10
Figure 10. Figure 10: Hardware Simulation Results of Threshold [PITH_FULL_IMAGE:figures/full_fig_p012_10.png]
Figure 11
Figure 11. Figure 11: (a) PYNQ-7020 FPGA Platform. (b) Results on [PITH_FULL_IMAGE:figures/full_fig_p012_11.png]

Discussion (0). Continue with ORCID to comment.

Reference graph

Works this paper leans on

53 extracted references · 25 canonical work pages

  1. [1]

    Azzam Alhussain and Mingjie Lin. 2023. FPGA-QHAR: Throughput- Optimized for Quantized Human Action Recognition on The Edge. arXiv:arXiv:2311.03390

    work page Pith review arXiv 2023

  2. [2]

    Billur Barshan and Kerem Altun. 2013. Daily and Sports Activities. UCI Machine Learning Repository. DOI: https://doi.org/10.24432/C5C59F

    doi:10.24432/c5c59f 2013

  3. [3]

    James Betker, Gabriel Goh, Li Jing, † TimBrooks, Jianfeng Wang, Linjie Li, † LongOuyang, † JuntangZhuang, † JoyceLee, † YufeiGuo, † WesamManassra, † PrafullaDhariwal, † CaseyChu, † YunxinJiao, and Aditya Ramesh. [n. d.]. Improving Image Generation with Better Captions. https://api.semanticscholar.org/CorpusID:264403242

    work page

  4. [4]

    Guoqiang Bi and Mu ming Poo. 1998. Synaptic Modifications in Cul- tured Hippocampal Neurons: Dependence on Spike Timing, Synaptic Strength, and Postsynaptic Cell Type. The Journal of Neuroscience 18 (1998), 10464 – 10472. https://api.semanticscholar.org/CorpusID: 16317084

    work page 1998

  5. [5]

    Gordon, Michael W

    William Ted Brown, Leslie B. Gordon, Michael W. Glynn, Michael R. Erdos, Christiane M. Robbins, Tracy Y . Moses, Peter Berglund, Amalia S. Dutra, Evgenia D. Pak, Sandra G. Durkin, Antonei B Csoka, Michael Boehnke, Thomas W. Glover, and Francis S. Collins. [n. d.]. Turning on and off recurrent balanced cortical activity. https: //api.semanticscholar.org/Co...

    work page

  6. [6]

    Erhan Bulbul, Aydin Cetin, and Ibrahim Alper Dogru. 2018. Human Activity Recognition Using Smartphones. In 2018 2nd International Symposium on Multidisciplinary Studies and Innovative Technologies (ISMSIT). 1–6. https://doi.org/10.1109/ISMSIT.2018.8567275

    arXiv 2018

  7. [7]

    Hanting Chen, Yunhe Wang, Chunjing Xu, Boxin Shi, Chao Xu, Qi Tian, and Chang Xu. 2019. AdderNet: Do We Really Need Multiplica- tions in Deep Learning? CVPR 2020. (2019). arXiv:arXiv:1912.13200

    work page Pith review arXiv 2019

  8. [8]

    Ping Chi, Shuangchen Li, Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, and Yuan Xie. 2016. PRIME: A Novel Processing-in- Memory Architecture for Neural Network Computation in ReRAM- Based Main Memory. In 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA). 27–39. https://doi.org/ 10.1109/ISCA.2016.13

    doi:10.1109/isca.2016.13 2016

Show all 53 references
  1. [9]

    Maurizio Ferrari Dacrema, Paolo Cremonesi, and Dietmar Jannach

  2. [10]

    Prasanna Date, Thomas Potok, Catherine Schuman, and Bill Kay. 2022. Neuromorphic Computing is Turing-Complete. In Proceedings of the International Conference on Neuromorphic Systems 2022 (ICONS ’22) . Association for Computing Machinery, New York, NY , USA, Article 16, 10 page...

    2022

  3. [11]

    Li Deng. 2012. The MNIST Database of Handwritten Digit Images for Machine Learning Research [Best of the Web].IEEE Signal Processing Magazine 29, 6 (2012), 141–142. https://doi.org/10.1109/MSP.2012. 2211477

    2012 doi

  4. [12]

    Marat Dukhan. 2019. The Indirect Convolution Algorithm. CoRR abs/1907.02129 (2019). arXiv:1907.02129 http://arxiv.org/abs/1907. 02129

    2019 arXiv

  5. [13]

    Mostafa Elhoushi, Zihao Chen, Farhan Shafiq, Ye Henry Tian, and Joey Yiwei Li. 2021. DeepShift: Towards Multiplication-Less Neu- ral Networks. In IEEE Conference on Computer Vision and Pattern Recognition Workshops, CVPR Workshops 2021, virtual, June 19- 25, 2021 . Computer Vi...

    2021

  6. [14]

    Kaiming He, Xiangyu Zhang, Shaoqing Ren, and Jian Sun. 2016. Deep Residual Learning for Image Recognition. In 2016 IEEE Conference on Computer Vision and Pattern Recognition (CVPR) . 770–778

    2016

  7. [15]

    Kai Huang and Wei Gao. 2022. Real-time neural network inference on extremely weak devices: agile offloading with explainable AI. In Proceedings of the 28th Annual International Conference on Mobile Computing And Networking (MobiCom ’22) . Association for Comput- ing Machinery,...

    2022

  8. [16]

    Itay Hubara, Daniel Soudry, and Ran El Yaniv. 2016. Binarized Neural Networks. arXiv:arXiv:1602.02505

    2016 arXiv

  9. [17]

    Seonjun Kim, Minjae Kim, and Youngki Lee. 2023. A Joint Analysis of Input Resolution and Quantization Precision in Deep Learning. In Pro- ceedings of the 29th Annual International Conference on Mobile Com- puting and Networking, ACM MobiCom 2023, Madrid, Spain, October 2-6, 20...

    2023

  10. [18]

    Alex Krizhevsky. 2009. Learning Multiple Layers of Features from Tiny Images. https://api.semanticscholar.org/CorpusID:18268744

    2009

  11. [19]

    Xiangyu Li, Yuanchun Li, Yuanzhe Li, Ting Cao, and Yunxin Liu

  12. [20]

    Xinlin Li, Bang Liu, Rui Heng Yang, Vanessa Courville, Chao Xing, and Vahid Partovi Nia. 2023. DenseShift : Towards Accurate and Effi- cient Low-Bit Power-of-Two Quantization. In IEEE/CVF International Conference on Computer Vision, ICCV 2023, Paris, France, October 1-6, 2023....

    2023

  13. [21]

    Zhou C Liang J, Yang Z. 2024. Excitation–Inhibition Balance, Neural Criticality, and Activities in Neuronal Circuits. The Neuroscientist. DOI: doi:10.1177/10738584231221766

    2024 doi

  14. [22]

    Shuying Liu and Weihong Deng. 2015. Very deep convolutional neural network based image classification using small training sample size. In 2015 3rd IAPR Asian Conference on Pattern Recognition (ACPR) . 730–734. https://doi.org/10.1109/ACPR.2015.7486599 Preprint, Zihao Zheng 1,...

    2015

  15. [23]

    Liu, Dragomir Anguelov, D

    W. Liu, Dragomir Anguelov, D. Erhan, Christian Szegedy, Scott E. Reed, Cheng-Yang Fu, and Alexander C. Berg. 2015. SSD: Single Shot MultiBox Detector. In European Conference on Computer Vision. https://api.semanticscholar.org/CorpusID:2141740

    2015

  16. [24]

    Daniela Micucci, Marco Mobilio, and Paolo Napoletano. 2016. UniMiB SHAR: a new dataset for human activity recognition using acceleration data from smartphones. arXiv:arXiv:1611.07688

    2016 arXiv

  17. [25]

    Neftci, Hesham Mostafa, and Friedemann Zenke

    Emre O. Neftci, Hesham Mostafa, and Friedemann Zenke. 2019. Surrogate Gradient Learning in Spiking Neural Networks: Bring- ing the Power of Gradient-Based Optimization to Spiking Neural Networks. IEEE Signal Processing Magazine 36, 6 (2019), 51–63. https://doi.org/10.1109/MSP....

    2019

  18. [26]

    Bissacco, Bo Wu, and A

    Yuval Netzer, Tao Wang, Adam Coates, A. Bissacco, Bo Wu, and A. Ng. 2011. Reading Digits in Natural Images with Unsupervised Feature Learning. https://api.semanticscholar.org/CorpusID:16852518

    2011

  19. [27]

    Mohammad Rastegari, Vicente Ordonez, Joseph Redmon, and Ali Farhadi. 2016. XNOR-Net: ImageNet Classification Using Binary Convolutional Neural Networks. arXiv:arXiv:1603.05279

    2016 arXiv

  20. [28]

    Girshick, and Ali Farhadi

    Joseph Redmon, Santosh Kumar Divvala, Ross B. Girshick, and Ali Farhadi. 2015. You Only Look Once: Unified, Real-Time Object Detection. 2016 IEEE Conference on Computer Vision and Pattern Recognition (CVPR) (2015), 779–788. https://api.semanticscholar.org/ CorpusID:206594738

    2015

  21. [29]

    Attila Reiss. 2012. PAMAP2 Physical Activity Monitoring. UCI Ma- chine Learning Repository. DOI: https://doi.org/10.24432/C5NW2H

    2012 doi

  22. [30]

    Joohong Rheey, Dayoung Choi, and Hyunggon Park. 2024. Poster: Symmetrical Pruning for Lightweight Network Anomaly Detector. In Proceedings of the 22nd Annual International Conference on Mo- bile Systems, Applications and Services, MOBISYS 2024, Minato-ku, Tokyo, Japan, June 3-...

    2024 doi

  23. [31]

    Daniel Roggen, Nguyen-Dinh Calatroni, Alberto, Ricardo Long- Van, Chavarriaga, and Hesam Sagha. 2012. OPPORTUNITY Ac- tivity Recognition. UCI Machine Learning Repository. DOI: https://doi.org/10.24432/C5M027

    2012 doi

  24. [32]

    Rohwedder, João P

    Caio S. Rohwedder, João P. L. de Carvalho, José Nelson Amaral, Guido Araújo, Giancarlo Colmenares, and Kai-Ting Amy Wang. 2021. Pooling Acceleration in the DaVinci Architecture Using Im2col and Col2im Instructions. In IEEE International Parallel and Distributed Processing Symp...

    2021

  25. [33]

    Sara Mahdavi, Raphael Gontijo Lopes, Tim Salimans, Jonathan Ho, David J

    Chitwan Saharia, William Chan, Saurabh Saxena, Lala Li, Jay Whang, Emily Denton, Seyed Kamyar Seyed Ghasemipour, Burcu Karagol Ayan, S. Sara Mahdavi, Raphael Gontijo Lopes, Tim Salimans, Jonathan Ho, David J. Fleet, and Mohammad Norouzi. 2022. Photorealistic Text- to-Image Dif...

    2022 doi arXiv

  26. [34]

    Stanley Williams, and Vivek Srikumar

    Ali Shafiee, Anirban Nag, Naveen Muralimanohar, Rajeev Balasubra- monian, John Paul Strachan, Miao Hu, R. Stanley Williams, and Vivek Srikumar. 2016. ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars. In 2016 ACM/IEEE 43rd Annual Int...

    2016 doi

  27. [35]

    Manli Sun, Zhanjie Song, Xiaoheng Jiang, Jing Pan, and Yanwei Pang

  28. [36]

    Christian Szegedy, Wei Liu, Yangqing Jia, Pierre Sermanet, Scott Reed, Dragomir Anguelov, Dumitru Erhan, Vincent Vanhoucke, and Andrew Rabinovich. 2015. Going deeper with convolutions. In 2015 IEEE Conference on Computer Vision and Pattern Recognition (CVPR) . 1–9. https://doi...

    2015

  29. [37]

    Gary Weiss. 2019. WISDM Smartphone and Smartwatch Activity and Biometrics Dataset . UCI Machine Learning Repository. DOI: https://doi.org/10.24432/C5HK59

    2019 doi

  30. [38]

    Yujie Wu, Lei Deng, Guoqi Li, Jun Zhu, and Luping Shi. 2017. Spatio- Temporal Backpropagation for Training High-Performance Spiking Neural Networks. Frontiers in Neuroscience 12 (2017). https://api. semanticscholar.org/CorpusID:6446489

    2017

  31. [39]

    Han Xiao, Kashif Rasul, and Roland V ollgraf. 2017. Fashion-MNIST: a Novel Image Dataset for Benchmarking Machine Learning Algorithms. arXiv:arXiv:1708.07747

    2017 arXiv

  32. [40]

    Lingxi Xie, Qi Tian, John Flynn, Jingdong Wang, and Alan Yuille. 2016. Geometric Neural Phrase Pooling: Modeling the Spatial Co-occurrence of Neurons. In Computer Vision – ECCV 2016 , Bastian Leibe, Jiri Matas, Nicu Sebe, and Max Welling (Eds.). Springer International Publishi...

    2016

  33. [41]

    Atallah, and Massimo Scanziani

    Mingshan Xue, Bassam V . Atallah, and Massimo Scanziani. 2014. Equalizing Excitation-Inhibition Ratios across Visual Cortical Neu- rons. Nature 511 (2014), 596 – 600. https://api.semanticscholar.org/ CorpusID:4458376

    2014

  34. [42]

    Haoran You, Xiaohan Chen, Yongan Zhang, Chaojian Li, Sicheng Li, Zihao Liu, Zhangyang Wang, and Yingyan Lin. 2020. ShiftAddNet: A Hardware-Inspired Deep Network. ArXiv abs/2010.12785 (2020). https://api.semanticscholar.org/CorpusID:225067910

    2020 arXiv

  35. [43]

    Haoran You, Baopu Li, Huihong Shi, Yonggan Fu, and Yingyan Lin

  36. [44]

    Lei Zhang, Shuai Wang, and B. Liu. 2018. Deep learning for sentiment analysis: A survey. Wiley Interdisciplinary Reviews: Data Mining and Knowledge Discovery 8 (2018). https://api.semanticscholar.org/ CorpusID:10694510

    2018

  37. [45]

    Mi Zhang and Alexander A. Sawchuk. 2012. USC-HAD: a daily activ- ity dataset for ubiquitous activity recognition using wearable sensors. Proceedings of the 2012 ACM Conference on Ubiquitous Computing (2012). https://api.semanticscholar.org/CorpusID:6870922

    2012

  38. [46]

    Pengfei Zhang, Dingzhu Wen, Guangxu Zhu, Qimei Chen, Kaifeng Han, and Yuanming Shi. 2024. Collaborative Edge AI Inference over Cloud-RAN. CoRR abs/2404.06007 (2024). https://doi.org/10.48550/ ARXIV .2404.06007 arXiv:2404.06007

    2024 doi arXiv

  39. [47]

    Shuai Zhang, Lina Yao, Aixin Sun, and Yi Tay. 2019. Deep Learning Based Recommender System: A Survey and New Perspectives. ACM Comput. Surv. 52, 1, Article 5 (feb 2019), 38 pages. https://doi.org/10. 1145/3285029

    2019

  40. [48]

    Xiaomao Zhou, Qingmin Jia, and Renchao Xie. 2022. NestFL: ef- ficient federated learning through progressive model pruning in het- erogeneous edge computing. In ACM MobiCom ’22: The 28th An- nual International Conference on Mobile Computing and Network- ing, Sydney, NSW, Austr...

    2022

  41. [49]

    Eshraghian

    Rui-Jie Zhu, Yu Zhang, Ethan Sifferman, Tyler Sheaves, Yiqiao Wang, Dustin Richmond, Peng Zhou, and Jason K. Eshraghian. 2024. Scalable MatMul-free Language Modeling. arXiv:arXiv:2406.02528

    2024 arXiv

  42. [2017]

    Neuro- comput

    Learning Pooling for Convolutional Neural Network. Neuro- comput. 224, C (feb 2017), 96–104. https://doi.org/10.1016/j.neucom. 2016.10.049

    2017 doi

  43. [2019]

    CoRR abs/1907.06902 (2019)

    Are We Really Making Much Progress? A Worrying Analysis of Recent Neural Recommendation Approaches. CoRR abs/1907.06902 (2019). arXiv:1907.06902 http://arxiv.org/abs/1907.06902

    2019 arXiv

  44. [2022]

    ShiftAddNAS: Hardware-Inspired Search for More Accurate and Efficient Neural Networks. In International Conference on Machine Learning, ICML 2022, 17-23 July 2022, Baltimore, Maryland, USA (Proceedings of Machine Learning Research) , Kamalika Chaudhuri, Stefanie Jegelka, Le So...

    2022

  45. [2024]

    In Proceedings of the 30th Annual Inter- national Conference on Mobile Computing and Networking (ACM MobiCom ’24)

    FlexNN: Efficient and Adaptive DNN Inference on Memory- Constrained Edge Devices. In Proceedings of the 30th Annual Inter- national Conference on Mobile Computing and Networking (ACM MobiCom ’24). Association for Computing Machinery, New York, NY , USA, 709–723. https://doi.or...

Pith tools

Reviewed August 11, 2026 · model on record in the stance chip above.