Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
RobustAnalog: Fast Variation-Aware Analog Circuit Design Via Multi-task RL
As of 10 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 1 inbound Pith citation observation for arXiv:2207.06412.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-10T06:31:04.303077+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-06T15:05:31.922316Z
A source-named dated measurement, never combined with another source.
Source: pith, observed 2026-08-06T15:05:34.569099Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
No source-named external measurement is stored.
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation f07ddc76-5719-4670-a37c-0c6a3a2245fa · inbound
PPAAS: PVT and Pareto Aware Analog Sizing via Goal-conditioned Reinforcement Learning cites this paper.
PPAAS: PVT and Pareto Aware Analog Sizing via Goal-conditioned Reinforcement Learning RobustAnalog: Fast Variation-Aware Analog Circuit Design Via Multi-task RL
Reference 9
- Resolution
- verified exact
- local_arxiv, observed 2026-08-06T15:05:34.684309Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-10T06:31:04.303077+00:00.