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Simulated non-Markovian Noise Resilience of Silicon-Based Spin Qubits with Surface Code Error Correction

T0 review · 3 major / 5 minor · reviewed 2026-08-06 · deepseek-v4-flash

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Pith's one-line read A distance-3 surface code on silicon spin qubits turns non-Markovian noise into memoryless logical errors, giving a logical coherence time that scales as the fourth power of the physical coherence time.

desk verdict A serious simulation study with a plausible but unproven quartic scaling claim; worth refereeing after convergence checks and a reproducibility pass. read the letter →

arxiv 2507.08713 v1 pith:CKMBCHOK submitted 2025-07-11 quant-ph

Oscar Gravier , Thomas Ayral , Benoît Vermersch , Tristan Meunier , Valentin Savin This is my paper
classification quant-ph
keywords siliconspinqubitssurfacecodequantumerrorcorrectionnon-Markoviannoise1/flogicalcoherencetimeXZZXsparsearchitecture
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

Silicon spin qubits are limited by temporally correlated (non-Markovian) noise in the Larmor frequency and the exchange coupling between neighbors. This paper asks whether a small distance-3 surface code can still protect such qubits, and how much the logical coherence time improves over the physical one. The numerical answer is that the surface code "Markovianizes" the noise: the logical qubit's fidelity decays exponentially in time even though the physical qubit's fidelity decays as a Gaussian, and in the regime where two-qubit exchange noise is not the bottleneck the logical coherence time grows as the fourth power of the physical coherence time. The practical consequence is that error correction on silicon spin qubits is far more powerful than a naive quadratic estimate would suggest, provided the exchange-noise channel is controlled and syndrome extraction is fast.

What carries the argument

The load-bearing object is the distance-3 rotated surface code run as a 17-qubit quantum memory, with the syndrome extraction circuit compiled into silicon spin-qubit native gates and the two-qubit gate $P=\mathrm{CZ}(S\otimes S)$ as the entangling operation. The main results use the $\pi$-pulse version of $P$, which inserts spin-refocusing $X$ pulses and thereby cancels Larmor-frequency deviations better than the symmetry-corrected version. Noise is injected through discrete-time traces of $\delta\omega_L$ and $\delta V_E$ with a $1/f$ power spectrum; each gate is replaced by a precomputed noisy-gate library entry, and decoding is performed on overlapping windows of three syndrome rounds with a minimum-weight perfect-matching decoder. The conceptual mechanism behind the headline result is the observed Markovianization: physical fidelity decays as a Gaussian while logical fidelity decays exponentially, so the per-cycle logical error rate is linear in $t_{\mathrm{QEC}}/T^*_{2,L}$ while the physical per-cycle error is quadratic in $t_{\mathrm{QEC}}/T^*_2$; combining that pair of scalings with the distance-3 quadratic error suppression gives $T^*_{2,L}\propto (T^*_2)^4/(t_{\mathrm{QEC}})^3$.

What would settle it

Keep $t_{\mathrm{QEC}}$ fixed and run the same emulation with only Larmor-frequency $1/f$ noise, sweeping $T^*_2$ over at least a decade; the log-log slope of $T^*_{2,L}$ versus $T^*_2$ must be 4 and the logical fidelity decay must remain exponential. If the slope is 2 instead, or if widening the decoding window changes the slope, the Markovianization assumption is the part that fails.

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Extended reading notes

Core claim

The paper claims that quantum error correction converts temporally correlated non-Markovian noise into Markovian (memoryless) logical noise for silicon spin qubits. In numerical emulations of a distance-3 rotated surface code subject to $1/f$ Larmor-frequency noise and exchange-energy noise, the logical qubit's Ramsey-like fidelity decays exponentially even though the physical qubit's fidelity decays as a Gaussian. In the regime where two-qubit exchange noise is not the bottleneck, the logical coherence time obeys $T^*_{2,L}\propto (T^*_2)^4/(t_{\mathrm{QEC}})^3$: the quadratic error-rate suppression of the distance-3 code combines with the Gaussian-to-exponential decay conversion to raise the naive quadratic scaling to a quartic one. Exchange-energy noise with small $T^*_J$ saturates this gain, fully spatially correlated noise leaves it nearly intact, and a sparse shuttling architecture preserves it up to shuttling times of about $0.1\,\mu\mathrm{s}$.

Load-bearing premise

The quartic law assumes that the distance-3 error-rate relation $p_L\propto p^2$ holds per QEC cycle even when the $1/f$ noise is correlated over times comparable to or longer than the three-round decoding window, and that $\delta\omega_L$ and $\delta V_E$ can be treated as frozen during each gate.

Editorial extensions

If this is right

  • Under the $\pi$-pulse $P$-gate syndrome circuit, the logical qubit fidelity decays exponentially even when physical qubit fidelity decays as a Gaussian, so the logical error process is effectively memoryless.
  • In the regime where exchange-energy noise is negligible and $T^*_2\gg t_{\mathrm{QEC}}$, the logical coherence time follows $T^*_{2,L}\propto (T^*_2)^4/(t_{\mathrm{QEC}})^3$, a quartic gain over the physical coherence time.
  • When two-qubit exchange noise is present with a small $T^*_J$, it caps the logical coherence time; improving $T^*_2$ alone no longer helps once the two-qubit error contribution dominates.
  • Fully spatially correlated $1/f$ noise degrades the logical coherence time only slightly and preserves the near-quartic scaling, because the syndrome circuit exposes different qubits to different gate sequences.
  • In a sparse shuttling architecture, performance remains close to nominal up to shuttling times around $0.1\,\mu\mathrm{s}$, and since shuttling cost does not grow with code distance, robustness is expected to persist or improve for larger codes.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Generalizing the paper's $d=3$ relation $p_L\propto p^2$ under the same Markovianization assumption predicts $T^*_{2,L}\propto (T^*_2)^{d+1}/t_{\mathrm{QEC}}^d$ for a distance-$d$ surface code, a concrete target for future $d=5$ emulations.
  • Because the logical noise is memoryless, standard Pauli-noise simulation tools may be adequate for predicting surface-code performance on silicon spin qubits even though the physical noise is non-Markovian; the paper suggests this but does not prove it.
  • An experimental test of the quartic law is within reach of a 17-qubit device: with exchange noise suppressed, sweeping the single-qubit $T^*_2$ by an order of magnitude should move $T^*_{2,L}$ by four orders of magnitude if the claim holds.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

3 major / 5 minor

Summary. The paper reports numerical emulation of a distance-3 rotated surface code (and its XZZX variant) on a silicon spin-qubit hardware model, with temporally correlated 1/f noise affecting both the Larmor frequency and the exchange coupling. A Ramsey-like logical memory experiment is simulated using the Qaptiva emulator, with a precomputed noisy-gate library and windowed minimum-weight perfect matching. The central result is Eq. (31): T*_2,L is proportional to (T*_2)^4 divided by (t_QEC)^3, derived from the code-distance relation p_L ∝ p^2, a Gaussian physical fidelity decay, and an exponential logical fidelity decay. The paper also analyzes fully spatially correlated noise and a sparse shuttling-based architecture.

Significance. If the quartic scaling is robust, it is a strong and practically relevant prediction: a distance-3 surface code would convert low-frequency Gaussian dephasing into exponentially decaying logical errors, yielding a fourth-power coherence-time enhancement that is qualitatively different from the quadratic scaling expected under Markovian noise. The work is valuable for using native silicon spin-qubit gates and a non-Pauli, temporally correlated noise model rather than the usual i.i.d. Pauli noise, and for explicitly addressing spatial correlation limits and shuttling-based sparse architectures. The central claim, however, rests on two numerical approximations whose convergence is not demonstrated: the constant-noise-per-gate library and the three-round decoder window. No code or data release is provided, and the emulator is proprietary, so the reported numerical results cannot currently be independently reproduced.

major comments (3)
  1. [Section III.B.1] The precomputed noisy-gate library assumes that δω_L and δV_E remain constant during each gate. Since the π-pulse P gate lasts 3 μs while the noise is sampled every 0.1 μs, this zero-order hold truncates intra-gate fluctuations and could systematically bias the gate error rates that enter the logical fidelity simulations. No convergence test with smaller t_s or with sub-sampled Trotter integration is reported, so the exponent in Eq. (31) could be affected by this approximation. Please quantify the sensitivity of the quartic scaling to this assumption.
  2. [Section III.B.5] The decoder matches syndromes in windows of three consecutive rounds with two consecutive windows overlapping by one round. For temporally correlated 1/f noise, a slow noise excursion can produce coherent over-rotations on the same data qubit across many rounds; these errors are not independent per round, and a windowed matching decoder may either miss them or treat them as multiple independent errors, changing the effective logical error rate. The paper does not test longer decoder windows or a full matching decoder, so the quadratic relation p_L ∝ p^2 in Eq. (30) is not independently validated for this noise model. I request a check that the quartic scaling in Fig. 9 is stable under decoder-window length.
  3. [Eqs. (30)-(31) and Fig. 9] The derivation inserts p_L ∝ p^2 from the code distance, but the simulation can directly test this relation by plotting the per-cycle logical error probability p_L = 1 - f_L(t_QEC) against p = 1 - f(t_QEC) for the same noise realizations. Without such a plot, the quartic law is an inference from the slope of T*_2,L versus T*_2 on a log-log plot, which could in principle be shaped by the constant-noise-per-gate and decoder-window approximations. A direct p_L-versus-p plot would make the central claim machine-checkable and should be added.
minor comments (5)
  1. [Section IV.B] The claim that QEC 'Markovianizes' the noise is stronger than what the exponential fidelity decay demonstrates: an exponential decay of the ensemble-averaged fidelity is necessary but not sufficient to establish that the logical channel is Markovian. Consider either softening the terminology or adding a test for correlations between consecutive logical error events.
  2. [Fig. 13 caption] The caption contains a typo: 'upped axis' should be 'upper axis'.
  3. [Fig. 9 caption] The caption states that error bars are 95% confidence intervals of the average logical fidelity, but the number of independent noise realizations used for each point and the procedure for propagating the confidence interval to T*_2,L are not given. Please report these details.
  4. [Section III.D] The shuttling noise model, which treats shuttling as idle dephasing scaled by a factor γ, is a phenomenological assumption; the text should state more explicitly the regime in which motional narrowing or shuttling-induced extra noise would invalidate this approximation.
  5. [Eq. (27)] The fitting form for T*_2(t_m, S_0) is written with a square root inside the logarithm in a way that is easy to misread; adding an explicit bracket or parentheses would improve clarity.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: Eq. (31) follows from independent Gaussian and exponential fits combined with standard distance-3 code scaling, not from a fitted or self-referential input.

full rationale

The central scaling claim, T*2,L proportional to (T*2)^4/(t_QEC)^3, is an algebraic consequence of Eq. (30), where p_L and p are defined from separate and independently obtained fits: p_L is extracted from an exponential fit of logical fidelity (Eq. 29), while p is extracted from a Gaussian fit of physical fidelity (Eq. 26). These fits are performed on different data and are not chosen to enforce Eq. (31). The proportionality p_L proportional to p^2 is taken from the standard distance-3 surface-code error suppression result, cited to Fowler et al. [18], rather than fitted to the simulation output. The paper's numerical results in Figs. 6, 9, 11, and 12 provide an independent check: the logical coherence time is obtained from the exponential decay of the logical fidelity, and the quartic line is presented as an observed scaling, not as a constraint used to define T*2,L. The approximations noted by a skeptical reader, such as the three-syndrome decoder window and the assumption that delta-omega_L and delta-V_E are constant during a gate, are potential accuracy limitations for temporally correlated noise, but they are not circular: they concern whether the input p_L proportional to p^2 and the fitted decay forms remain valid, not whether the result is defined into existence. The paper's self-citations concern hardware parameters, pulse shapes, and shuttling implementations, and none of these is load-bearing for the logical coherence time scaling law. No equation or fitted parameter reduces the target result to its own inputs.

Assumptions & free parameters 7 free parameters · 6 assumptions · 0 invented entities

The free parameters are mostly hardware-calibrated inputs, noise intensities used to sweep the physical coherence times, and fit coefficients for secondary models. The central quartic law depends on these only through the resulting T*_2 and T*_J values and on the standard code-distance quadratic error suppression; no invented physical entities are introduced.

free parameters (7)
  • S0 Larmor noise intensity = 10^-6 to 2.5e-5 MHz^2 in logical runs; 2.5e-7 to 2.5e-4 MHz^2 in Appendix C
    Physical input of the 1/f noise model; varied to sweep T*_2, the x-axis of the main scaling plots.
  • S0 exchange/potential noise intensity = 0.0125 to 0.25 MHz^2 in Appendix C; tuned to T*_J values 0.65-8.57 microseconds
    Input noise strength for exchange-gate potential fluctuations; controls the second physical timescale T*_J.
  • B0 and omega0 pulse amplitudes = B0 approx 2.1 MHz, omega0 = 5 MHz
    Chosen to match ESR hardware limits from Section V A; set gate durations for X and Z rotations.
  • delta-Er-Z and J0 two-qubit pulse parameters = delta-Er-Z = 10 MHz, J0 = 2 MHz
    Selected so the P gate is adiabatic with high fidelity; determined by numerical simulation in Appendix A.
  • a and b in J(VE) exponential fit = a = 0.06 MHz, b = 0.24 per mV
    Fit to experimental data from Ref [36] in Appendix B; converts exchange potential deviations into delta-J.
  • C and A,C fits for T*_2(t_m) and T*_J(t_m) = C approx 4.36 for T*_2; A approx 0.024, C approx 2.52 for T*_J
    Fitted to the numerical Ramsey data in Appendix C to capture the ln(t_m) dependence of coherence times.
  • A and B in sparse-architecture scaling = B approx 0.34; A not stated in text
    Fitted to the logical coherence times in Fig 13; used only for the shuttling-time model, not for the central quartic law.
assumptions (6)
  • standard math Distance-3 surface code suppresses logical error rate as p_L proportional to p^2 per QEC cycle
    Invoked in Eq (30); standard code-distance threshold property from Ref [18].
  • domain assumption Fourier filtering of discrete-time traces produces wide-sense stationary 1/f noise with the intended PSD
    Section III B.3; if phase statistics or stationarity are wrong, the time-correlated noise is not representative of silicon spin qubit environments.
  • domain assumption delta-omega-L and delta-V-E are constant during each gate
    Section III B.1; precomputed noisy gate library ignores intra-gate fluctuations at timescales below the gate duration.
  • ad hoc to paper Spatial correlations are bounded by the fully uncorrelated and fully correlated cases
    Section III C; the paper assumes these two boundary cases suffice for a d=3 code, without scanning intermediate correlation lengths.
  • ad hoc to paper Shuttling noise is equivalent to idle dephasing scaled by a factor gamma
    Section III D; used for sparse architecture results; real shuttling can introduce additional error mechanisms.
  • domain assumption Excluding measurement and initialization errors isolates the non-Markovian contribution
    Section III B; the comparison to physical qubits omits these hardware errors, so absolute logical times are upper bounds.

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Cite this review

Pith. "Pith review of Simulated non-Markovian Noise Resilience of Silicon-Based Spin Qubits with Surface Code Error Correction." pith.science (2026). https://pith.science/paper/CKMBCHOK

@misc{pith2026250708713,
  author       = {Pith},
  title        = {Pith review of: Simulated non-Markovian Noise Resilience of Silicon-Based Spin Qubits with Surface Code Error Correction},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/CKMBCHOK}},
  note         = {Machine review of arXiv:2507.08713}
}
read the original abstract

We investigate the resilience of silicon-based spin qubits against non-Markovian noise within the framework of quantum error correction. We consider a realistic non-Markovian noise model that affects both the Larmor frequency and exchange energy of qubits, allowing accurate simulations of noisy quantum circuits. We employ numerical emulation to assess the performance of the distance-3 rotated surface code and its XZZX variant, using a logical qubit coherence time metric based on Ramsey-like experiments. Our numerical results suggest that quantum error correction converts non-Markovian physical noise into Markovian logical noise, resulting in a quartic dependence of coherence time between physical and logical qubits. Additionally, we analyze the effects of spatial noise correlations and sparse architectures, substantiating the robustness of quantum error correction in silicon-based spin qubit systems.

Figures

Figures reproduced from arXiv: 2507.08713 by the authors.

Figure 1
Figure 1. (left) A 2D lattice of quantum dots/spin qubits. A [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. J(t) and B0(t) pulses representation during a π-pulse P gate. J(t)/2 indicates a J(t) pulse with the same duration as for the P ′ gate, but with amplitude J0/2. Finally, we note that for noisy gates, the Hamilto￾nian Hr1 is integrated numerically, and the rotation or π-pulse (X) gates used to implement the Psym-corr or Pπ-pulse gates are also assumed to be noisy, following the single-qubit gate noise model described… view at source ↗
Figure 4
Figure 4. Construction of a noisy quantum circuit using the gen [PITH_FULL_IMAGE:figures/full_fig_p007_4.png] view at source ↗
Figures from the paper (7 more)
Figure 5
Figure 5. Figure 5: Example of a cluster-based architecture. Manipula [PITH_FULL_IMAGE:figures/full_fig_p009_5.png]
Figure 6
Figure 6. Figure 6: Average fidelity over time between the log [PITH_FULL_IMAGE:figures/full_fig_p010_6.png]
Figure 7
Figure 7. Figure 7: Impact of the Larmor frequency deviation [PITH_FULL_IMAGE:figures/full_fig_p011_7.png]
Figure 8
Figure 8. Figure 8: Impact of the energy difference parameter [PITH_FULL_IMAGE:figures/full_fig_p012_8.png]
Figure 10
Figure 10. Figure 10: (left) Heatmap visualization of T ∗ 2,L as a function of (T ∗ 2 , T ∗ J ). Vertical and horizontal lines correspond to reference T ∗ 2 or T ∗ J values, as explained in the text. (right) T ∗ 2,L as a function of T ∗ 2 , assuming T ∗ J varies with T ∗ 2 , such that the …
Figure 11
Figure 11. Figure 11: Average fidelity of physical and logical qubits as a [PITH_FULL_IMAGE:figures/full_fig_p014_11.png]
Figure 13
Figure 13. Figure 13: Logical qubit coherence time as a function of the [PITH_FULL_IMAGE:figures/full_fig_p015_13.png]

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Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Biased-noise qubits: a guide to efficient fault-tolerance using the hierarchy of errors

    quant-ph 2026-07 conditional novelty 4.0 of 10

    Using only CZ gates and X-basis readout erases the advantage of biased noise; a bias-preserving CX gate—or a QND multi-qubit Z measurement replacing it—unlocks large overhead reductions.

Reference graph

Works this paper leans on

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    We consider first the case of ideal gates (δωL = 0), for which the Hamiltonian (1) rewrites as H(t) = 1 2 B0(t) (cos(φ)X+ sin(φ)Y)

    Gates with driving field (X,YandK-family) For theses gates, we use a driving fieldB 0(t)and set ωadd(t) = 0. We consider first the case of ideal gates (δωL = 0), for which the Hamiltonian (1) rewrites as H(t) = 1 2 B0(t) (cos(φ)X+ sin(φ)Y). SinceHis time- commuting (that is,H(t 1)H(t 2) =H(t 2)H(t 1),∀t 1, t2), the corresponding time evolution operator is...

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    Gates without driving field (Z-axis rotations) To implement rotations about theZ-axis, we use no driving field (B 0(t) = 0), but instead use a controlled shift,ω add(t), of the reference Larmor frequency. We consider first the case of ideal gates (δω L = 0), for which the gate Hamiltonian (1) rewrites as H(t) = 1 2 ωadd(t)Z, and the corresponding time evo...

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    We repeat steps 3-5 five hundred times, allowing us to determine the average fidelity between the corrected state and the initial logical state, as a function of time (that is, averaging, for eacht= 2tQEC ,4t QEC , . . . ,2ntQEC , over fidelity values obtained at step 5). We n...

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