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REVIEW 2 major objections 10 minor 57 references

Hardware-efficient erasure-error detection with an integer fluxonium

T0 review · 2 major / 10 minor · reviewed 2026-07-30 · grok-4.5

Pith's one-line read A single integer fluxonium turns most relaxation into detectable erasures and checks them without an ancilla, cutting gate error in half after postselection.

desk verdict Solid ancilla-free erasure-check experiment on integer fluxonium with honest postselected gains; check back-action keeps it from being a high-bias erasure qubit yet. read the letter →

arxiv 2607.27123 v1 pith:EGADUBPI submitted 2026-07-29 quant-ph

classification quant-ph
keywords integerfluxoniumerasurequbitg-fencodingmid-circuitcheckancilla-freereadoutquantumerrorcorrectiondispersiveshiftnullingleakageconversion
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

Erasure errors—mistakes whose time and place are known—are far easier for quantum error correction to handle than ordinary unknown Pauli errors. This paper shows that one integer fluxonium qubit can be wired so that its computational states sit in the ground and second excited levels while the first excited level acts as an erasure flag. The device’s symmetry strongly suppresses direct flips between the two logical states, so most decays from the upper logical state pass through the flag and can be spotted. A carefully chosen design also cancels the resonator frequency difference between the two logical states, letting the same readout resonator perform mid-circuit erasure checks without an extra ancilla qubit. After discarding the flagged shots the authors measure an 8.4-fold longer upper-state lifetime, a 38 % longer echo time, and single-qubit gate error falling from 0.061 % to 0.030 %. The work therefore offers a hardware-light route to erasure detection while spelling out the remaining obstacles—missed erasures and check-induced errors—that still prevent a high erasure-bias qubit.

What carries the argument

Integer-fluxonium g–f encoding at zero flux: parity and wave-function support forbid direct |f⟩↔|g⟩ transitions while a parameter window nulls the logical resonator shift χ_gf ≪ χ_ge, enabling the same resonator to discriminate |e⟩ without dephasing the computational manifold.

What would settle it

Repeat the lifetime, echo and randomized-benchmarking sequences while deliberately increasing the erasure-check photon number or duration; if the post-selected gains reverse or the residual Pauli error rises faster than the discarded leakage, the claimed net benefit of ancilla-free checks disappears.

Watch

Extended reading notes

Core claim

In a single integer fluxonium encoded with logical states |g⟩ and |f⟩ and erasure state |e⟩, the architecture converts the dominant |f⟩→|e⟩ decays into detectable erasures and supports ancilla-free mid-circuit checks on the shared readout resonator because the logical dispersive shift can be nulled. Post-selecting against those checks yields an 8.4-fold rise in |f⟩ lifetime (to 5.087 ± 0.685 ms), a 1.38-fold Hahn-echo gain (to 620 ± 14 µs), and average single-qubit gate error reduced from 0.061(2) % to 0.030(5) %, with roughly 94 % of leakage identified.

Load-bearing premise

The mid-circuit resonator checks themselves must not convert erasures into undetected Pauli errors faster than post-selection can remove them; the measured false-negative rate and excess check-induced error show this is still fragile.

Editorial extensions

If this is right

  • A single physical qubit plus one shared resonator can supply both final readout and mid-circuit erasure flags, cutting the hardware overhead of dual-rail erasure qubits.
  • Post-selection already halves single-qubit gate error and multiplies T1 by eight, giving a concrete near-term performance boost even before full error correction.
  • Because erasures are strongly state-asymmetric (mostly from |f⟩), erasure-aware decoders gain free prior information that can raise thresholds further.
  • Zero-flux operation reduces the bias current needed relative to half-flux fluxonium, lowering potential heating from bias lines.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • If the check-induced collapse of the erasure-state lifetime can be cured—by a weaker drive, a dedicated ancilla, or bath engineering—the same device geometry would immediately satisfy the high erasure-bias condition the authors still lack.
  • The demonstrated χ_gf-nulling window is fabrication-tolerant enough that multi-qubit chips could share a common resonator design rule, simplifying scaling of ancilla-free erasure lattices.
  • State-asymmetric erasures plus the measured false-negative statistics supply a concrete noise model that existing erasure-aware surface-code simulators can plug in today to forecast logical thresholds.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

2 major / 10 minor

Summary. The manuscript demonstrates a single integer fluxonium operated as a g–f erasure qubit, with logical states |g>,|f> and erasure state |e>. Two enabling device properties are established: (i) a relaxation hierarchy T1^{f→e} ≈ 0.4–0.6 ms versus T1^{f→g} ≈ 4–6 ms, so most |f> decay is convertible to detectable erasures; and (ii) a design point with chi_ge/2pi = 1.86±0.03 MHz and chi_gf/2pi = −11.9±13.8 kHz, enabling ancilla-free mid-circuit erasure checks through the same resonator used for final readout. Postselecting against detected erasures yields conditional improvements: |f> lifetime 0.606→5.087 ms (8.4x), Hahn echo 450→620 µs (1.38x), and RB error per sqrt(X) 0.061(2)%→0.030(5)%, with ~94% of leakage identified. The authors characterize check imperfections — 0.4% false positives, 7.8% false negatives traced to a check-induced collapse of T1^{e→g} to ~20 µs (App. L), 374 Hz induced decoherence versus 17.6 Hz predicted pure dephasing, and 2.49% added error per check of unknown origin — and explicitly state the device does not yet satisfy the erasure-bias condition.

Significance. If the results hold, this is a useful hardware-level advance for erasure-qubit architectures: it replaces the dual-rail-plus-ancilla footprint with a single three-level device whose readout resonator performs both erasure checks and final readout. Strengths that deserve emphasis: the central claims are measured device metrics, not simulations — conditional T1, echo, and RB improvements are each shown with multi-cadence data; the chi_gf-nulling design point is confirmed spectroscopically with uncertainties; the leakage accounting combines LRB with direct classification-error histograms; and the Monte-Carlo postselection model reproduces the non-exponential postselected decay, supporting the T_f→g extraction. The authors also report the check's failure modes (7.8% false negatives, 2.49%/check excess error of unknown origin) rather than burying them, and correctly stop short of claiming erasure bias. The work sits within current consensus on erasure qubits; correctness risk is confined to the quantitative severity of check back-action, which my major comments ask the authors to compute from existing data.

major comments (2)
  1. [§III.E.2, §IV, App. L] §III.E.2, §IV, App. L: The manuscript's central caveat — that missed erasures degrade erasure bias — is left qualitative, yet the paper's own numbers quantify it and the result is material to the platform claim. Single-check false negatives (7.8%, from the check-induced collapse of T_e→g to ~20 µs) plus between-check e→g decay at the natural T_e→g (~3% at 16 µs cadence) imply ~11% of f→e events terminate as undetected |f>→|g> bit flips: an injected Pauli rate ~Gamma_f→e × 0.11 ≈ 220 Hz for a qubit in |f>, comparable to the bare Gamma_f→g ≈ 1/(4–6 ms). The effective bias thus falls from ~10:1 to ~5:1 precisely when the checks run. Please add this accounting — detected-erasure vs undetected-Pauli rates at the demonstrated cadences. All inputs are already measured; no new data are needed.
  2. [Fig. 4(d,e), Fig. 5(d), Eq. (3)] Two quantitative points need reconciliation. (i) Fig. 4(e) shows Pauli error flat vs check cadence, yet the missed-erasure cascade should inject Pauli error growing with check rate. A rough estimate gives only ~10^-3 %/sqrt(X) at the 80-Clifford cadence — below LRB resolution — so the flatness is expected; please state this bound explicitly so Fig. 4(e) is not read as excluding the cascade channel. (ii) The 2.49±0.19% added error per check is 5x the Eq. (3) incoherent budget and of unknown origin. Please decompose it into leakage vs Pauli using the cadence-resolved LRB data already in hand, and report the per-check added error after postselection (the operationally relevant figure). If the excess is mostly detectable leakage, the platform conclusion is strengthened; if Pauli, the §IV bias concern is sharpened — either answer changes the interpretation of the headline RB result.
minor comments (10)
  1. [§III.E.4, Eq. (3)] Eq. (3): the two lines use inconsistent conventions — 1/2 vs 1/3 on the T1^{f→e} term, and T_phi^E vs T2^E. The first line appears to be an editing remnant. Also, using 1/3 sits oddly with App. F, which derives t/(2 T1^{f→e}) for the leakage contribution to gate fidelity; the 1/2 choice would raise the budget to ~0.52%. The conclusion (excess >> budget) is unchanged, but the formula should be internally consistent.
  2. [Abstract / §III.D] The RB improvement is quoted as 0.061(2)% → 0.030(5)%, i.e. relative to the checks-present value; the no-check baseline is 0.049(2)%. Please also state the net improvement versus no checks (0.049% → 0.030%), which is the operationally relevant figure for the proposed operating mode.
  3. [§II.B, final paragraph] The claim that no-click back-action 'conserves state purity and can be echoed away' needs justification or a reference. For a superposition input, conditional no-jump evolution is a deterministic but non-unitary amplitude reweighting of |g> vs |f>; clarify in what sense it cancels in the echo/RB measurements.
  4. [§III.E.2 / App. L] Since a JTWPA provides high readout efficiency, state whether reducing nbar (with longer integration) or re-optimizing the check frequency was explored to mitigate the T_e→g collapse. Fig. 13 suggests nbar organizes the data — is the collapse purely nbar-dependent at fixed detuning? This is the dominant missed-erasure channel, so even negative results are worth reporting.
  5. [Table II, App. B] State which cooldown (Cycle 1 or 2) produced the main-text results. kappa_i differs 5.6x between cycles (0.078 vs 0.439 MHz), suggesting parameter drift; please comment on the reproducibility of the chi_gf nulling across cooldowns.
  6. [§III.D] State explicitly how '94% of leakage identified' is computed: the postselection rate 0.039(1)%/sqrt(X) exceeds the LRB leakage 0.033(6)%/sqrt(X), so the figure cannot be a simple ratio of those two numbers.
  7. [§II.B vs Fig. 1(b) caption] Well positions are given as phi/2pi = ±1 in the text but 'approximately ±2pi' in the figure caption — reconcile the units/phrasing.
  8. [Note added / Refs. [34, 36]] Please add one or two sentences delineating the delta over prior/concurrent single-fluxonium erasure work [34, 36] — e.g., that those establish erasure conversion whereas this work adds ancilla-free mid-circuit checks via chi_gf nulling and postselected RB — rather than leaving this to the note added.
  9. [Fig. 4(e), Fig. 5(a)] 'Cadence' is expressed in Cliffords in RB (Fig. 4) and microseconds in the coherence measurements (Fig. 3); give the µs equivalents (50–140 Cliffords ≈ 11–31 µs) to ease comparison. Fig. 5(a): the false-positive rate 0.4±1.0% has an uncertainty exceeding the central value — consider quoting an upper bound.
  10. [Throughout] Typos/typesetting: heading 'MEASUREMENT RESUL TS'; 'evaulate' (end of §II.C); 'neaer' (App. E); 'Nubmber of Cliffords' (Fig. 10 axis); 'to approximately models' (App. D.2); missing spaces around kets in the abstract ('states|g>,|f>encode').

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: central claims are measured device metrics (spectra, χ, T1/T2E, RB/LRB, classification errors), not tautologies from fitted definitions or self-citation chains.

full rationale

This is an experimental device paper. Load-bearing results—χ_ge ≫ |χ_gf|, T_f→e ≪ T_f→g, postselected lifetime/echo/gate gains, false-positive/negative rates, and LRB error budgets—are obtained from independent measurements (spectroscopy, population decay, Hahn echo, Clifford RB with mid-circuit checks, IQ histograms). Spectroscopy-fitted E_C, E_J, E_L and AC-Stark-calibrated n̄ are standard instrument parameters used to operate and model the device, not recycled as theoretical “predictions.” The χ_gf≈0 design space is Hamiltonian-simulated then measured on the fabricated chip; agreement is empirical validation, not definitional identity. Postselected T1 “reflecting” fitted T_f→g is a consistency check between two analyses of decay data, not a forced prediction. Theory comparisons (measurement-induced dephasing Eq. 1 vs measured 374 Hz; incoherent check-error budget Eq. 3 vs 2.49%) explicitly report discrepancies rather than claiming success by construction. Self-citations (integer-fluxonium / g-f erasure literature) supply context and related proposals; none is a uniqueness theorem that forces the experimental claims. No step reduces a claimed first-principles or predictive result to its own fitted input.

Assumptions & free parameters 6 free parameters · 6 assumptions · 0 invented entities

The work is an experimental circuit-QED demonstration. It inherits standard Markovian three-level relaxation, dispersive readout, and RB/LRB statistics; device energies and readout couplings are fitted; erasure-check drive settings are chosen for discrimination vs back-action. No new physical entities are postulated. The central postselection claims rest on the empirical hierarchy Γf→e ≫ Γf→g and on the engineered |χgf|≪|χge|, both measured rather than assumed into existence.

free parameters (6)
  • Fluxonium energies EC, EJ, EL = EC/h=1.392 GHz, EJ/h=5.056 GHz, EL/h=0.193 GHz (cycle 1)
    Extracted by fitting two-tone spectroscopy; set the integer-fluxonium regime and matrix-element hierarchy used throughout.
  • Qubit-resonator coupling g and resonator κi, κc = g/2π≈97 MHz; κc/2π≈1.37 MHz, κi/2π≈0.078 MHz (cycle 1)
    Determine dispersive shifts χge, χgf and photon dynamics during erasure checks; obtained from device spectroscopy/fit.
  • Erasure-check frequency, duration, amplitude (¯n) = 1.1 µs, ¯n≈1.7 on |e⟩, fd=7.39020 GHz (cycle 1)
    Hand-chosen to separate |e⟩ from {|g⟩,|f⟩} in IQ space while limiting logical dephasing; directly set false± rates and induced error.
  • Effective rates Tf→e, Te→g, Tf→g and Tqb in three-state fit = Tf→e~400–600 µs; Te→g~200–300 µs; Tf→g~4–6 ms
    ODE/MC fits to population trajectories; postselected lifetime interpretation depends on extracted Tf→g.
  • Two-photon gate drive amplitude and frequency = 70 ns plateau, 10 ns edges; values from iterative calibration (Fig. 14)
    Jointly calibrated via error-amplifying sequences under large AC Stark shift; set baseline RB error before/after checks.
  • ¯n/V_RO^2 Stark calibration constant = ¯n/V_RO^2=25.3 V^-2
    Converts readout voltage to photon number used in dephasing estimates and check characterization.
assumptions (6)
  • domain assumption Markovian three-level rate equations (and thermal detailed balance) adequately describe |g⟩,|e⟩,|f⟩ population dynamics between checks.
    Appendix D ODEs/MC underpin extracted Tf→e, Te→g, Tf→g and postselected non-exponential T1 interpretation.
  • domain assumption Dispersive circuit-QED measurement theory (χ shifts, measurement-induced dephasing formula) applies to the erasure check.
    Sec. III.E compares measured induced decoherence to Gambetta-type Γφ; discrepancy is then attributed to T1 enhancement.
  • domain assumption Parity selection at zero flux forbids one-photon |g⟩↔|f⟩; computational gates proceed via effective two-photon drive through |e⟩.
    Sec. II and Appendix H; justifies encoding and square-root-cosine envelope / 2φ phase rule.
  • domain assumption Leakage randomized benchmarking (Wood–Gambetta-type) correctly partitions Pauli vs leakage per √X under the implemented Clifford decomposition.
    Appendix G; used for 0.061%→0.030% error claim and 94% leakage detection fraction.
  • standard math Standard rotating-wave and adiabatic-elimination approximations for the driven three-level system.
    Appendix H derivation of effective two-photon Rabi coupling and Stark shifts.
  • ad hoc to paper Postselection on mid-circuit |e⟩ detections is a valid proxy for the benefit of erasure information in this characterization (not a full fault-tolerant decoder).
    All headline lifetime/gate gains are conditional on discarding flagged shots; QEC threshold claims are not directly measured.

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Pith. "Pith review of Hardware-efficient erasure-error detection with an integer fluxonium." pith.science (2026). https://pith.science/paper/EGADUBPI

@misc{pith2026260727123,
  author       = {Pith},
  title        = {Pith review of: Hardware-efficient erasure-error detection with an integer fluxonium},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/EGADUBPI}},
  note         = {Machine review of arXiv:2607.27123}
}
abstract

Erasure-error detection can improve the efficiency of quantum error correction by revealing the times and locations of their error events. In this work, we demonstrate erasure conversions and mid-circuit erasure detections in a single integer fluxonium, in which the states $\mathrm{|g\rangle, |f\rangle}$ encode the logical states and $\mathrm{|e\rangle}$ encodes the erasure state. The integer fluxonium suppresses direct $|\mathrm{f} \rangle \rightarrow |\mathrm{g} \rangle$ transitions and allows the dominant $|\mathrm{f} \rangle \rightarrow |\mathrm{e}\rangle$ transitions to be converted into detectable erasures. Furthermore, we identified a design space that nullifies the resonant-frequency shift between the two logical states, enabling ancilla-free mid-circuit erasure checks using the same resonator employed for final readout. By discarding the detected erasure events, we achieved an 8.4-fold increase in the $|\mathrm{f}\rangle$ state lifetime, a 1.38-fold increase in the Hahn-echo time, and a reduction of single-qubit gate error from 0.061(2)% to 0.030(5)%. Our results establish integer fluxonium as a hardware-efficient platform for erasure-error detection and conversion, while identifying the improvements required to realize an effective erasure qubit with high erasure bias.

Figures

Figures reproduced from arXiv: 2607.27123 by the authors.

Figure 1
Figure 1. FIG. 1. (a) Concept of a g-f erasure qubit. The compu [PITH_FULL_IMAGE:figures/full_fig_p002_1.png] view at source ↗
Figure 2
Figure 2. FIG. 2. (a) Device geometry of the integer fluxonium qubit. [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. FIG. 3. (a, b) Pulse sequences for measuring (a) [PITH_FULL_IMAGE:figures/full_fig_p004_3.png] view at source ↗
Figures from the paper (10 more)
Figure 4
Figure 4. Figure 4: FIG. 4. (a) RB results without erasure checks (black), with erasure checks (blue), and after discarding erasure errors (red). [PITH_FULL_IMAGE:figures/full_fig_p005_4.png]
Figure 5
Figure 5. Figure 5: FIG. 5. (a, b) Histograms of the integrated readout signal [PITH_FULL_IMAGE:figures/full_fig_p006_5.png]
Figure 6
Figure 6. Figure 6: FIG. 6. Room-temperature and cryogenic wiring of the ex [PITH_FULL_IMAGE:figures/full_fig_p012_6.png]
Figure 7
Figure 7. Figure 7: FIG. 7. (a) IQ plane histogram of the single-shot distributions [PITH_FULL_IMAGE:figures/full_fig_p013_7.png]
Figure 8
Figure 8. Figure 8: FIG. 8. Monte Carlo simulations of the [PITH_FULL_IMAGE:figures/full_fig_p015_8.png]
Figure 9
Figure 9. Figure 9: FIG. 9. (a, b) Simulated dispersive shift magnitude of the [PITH_FULL_IMAGE:figures/full_fig_p015_9.png]
Figure 10
Figure 10. Figure 10: FIG. 10. (a) Population fraction remaining the computational [PITH_FULL_IMAGE:figures/full_fig_p017_10.png]
Figure 12
Figure 12. Figure 12: FIG. 12. (a) Pulse sequence for the virtual-Z (VZ) angle cali [PITH_FULL_IMAGE:figures/full_fig_p019_12.png]
Figure 13
Figure 13. Figure 13: FIG. 13. (a) [PITH_FULL_IMAGE:figures/full_fig_p020_13.png]
Figure 14
Figure 14. Figure 14: FIG. 14. Single-qubit gate calibration procedure in the integer fluxonium in this research. (a) Broad sweep of drive amplitude [PITH_FULL_IMAGE:figures/full_fig_p020_14.png]

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Pith tools

Reviewed July 30, 2026 · model on record in the stance chip above.