Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference
As of 9 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 3 inbound Pith citation observations for arXiv:2408.06003.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-09T06:31:02.800959+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-07T14:52:08.732203Z
A source-named dated measurement, never combined with another source.
Source: arxiv_reference, observed 2026-08-05T02:28:24.338817Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
1
arxiv_reference, observed 2026-08-05T02:28:24.338817Z
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation d36f68ad-7c89-4972-8b6d-d14ed1967ed3 · inbound
LCD: Advancing Extreme Low-Bit Clustering for Large Language Models via Knowledge Distillation cites this paper.
LCD: Advancing Extreme Low-Bit Clustering for Large Language Models via Knowledge Distillation LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference
Reference 8
- Resolution
- unresolved
- no resolver link, observed 2026-08-07T14:52:08.732203Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation 43d5ddcc-a41b-47f9-a74e-266fd18f333f · inbound
Vec-LUT: Vector Table Lookup for Parallel Ultra-Low-Bit LLM Inference on Edge Devices cites this paper.
Vec-LUT: Vector Table Lookup for Parallel Ultra-Low-Bit LLM Inference on Edge Devices LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference
Reference 33
- Resolution
- verified exact
- arxiv_id, observed 2026-05-17T00:48:45.775237Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.
Observation 17494398-95f6-4d0f-96fa-3f370d0fae84 · inbound
EVA: Accelerating LLM Decoding via an Efficient Vector Quantization Architecture cites this paper.
EVA: Accelerating LLM Decoding via an Efficient Vector Quantization Architecture LUT Tensor Core: A Software-Hardware Co-Design for LUT-Based Low-Bit LLM Inference
Reference 45
- Resolution
- verified exact
- arxiv_id, observed 2026-06-30T14:44:45.059013Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-09T06:31:02.800959+00:00.