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Interfacing Quantum Computing Systems with High-Performance Computing Systems: An Overview

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arxiv 2509.06205 v1 pith:IOZDAGC3 submitted 2025-09-07 quant-ph

classification quant-ph
keywords computingsystemsintegrationsoftwarehardwarehpc-qchybriddevelopments
verification ladder T0 review T1 audit T2 compute T3 formal
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The connection and eventual integration of High-Performance Computing (HPC) with Quantum Computing (QC) represents a transformative advancement in computational technology, promising significant enhancements in solving complex, previously intractable problems. This manuscript provides a comprehensive overview of the current state of HPC-QC interfacing, detailing architectural methodologies, software stack developments, middleware functionalities, and hardware integration strategies. It critically assesses existing hardware-level integration models, ranging from standalone and loosely-coupled architectures to tightly-integrated and on-node systems. The software ecosystem is analyzed, highlighting prominent frameworks such as Qiskit, PennyLane, CUDA-Q, and middleware solutions like Pilot-Quantum, essential for seamless hybrid computing environments. Furthermore, the manuscript discusses practical applications in optimization, machine learning, and many-body dynamics, where hybrid HPC-QC systems can offer substantial advantages. It also describes existing challenges, including hardware limitations (coherence, scalability, connectivity), software maturity, communication overhead, resource management complexities, and cost factors. Finally, future directions towards tighter hardware and software integration are discussed, emphasizing ongoing research developments and emerging trends that promise to expand the capabilities and accessibility of hybrid HPC-QC systems.

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Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. QCORE: A Quantum-Control-Oriented Real-Time Execution Architecture with Extensible Closed-Loop Services and Shared AI Acceleration

    quant-ph 2026-08 conditional novelty 6.0 of 10

    QCORE is a reference architecture for QPU-side digital control that combines real-time execution, fast feedback, calibration/QEC services, and safe configuration update, evaluated only through behavioral models.

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