Typed states for the displayed outbound observations.
Source: paper_references, paper_reference_links
Paper Citation Record · LEDGER
AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis
As of 8 August 2026, this Paper Citation Record lists 0 of 0 outbound references and 2 inbound Pith citation observations for arXiv:2409.08534.
A citation records a reference. It does not transfer a finding from one paper to another.
Coverage vector
One-hop event checks from named stored sources.
Source: scholarly_work_events, retraction_status_cache, observed 2026-08-08T06:32:00.761636+00:00
Pith citing papers itemized under the disclosed page cap.
Source: paper_references, paper_reference_links, observed 2026-08-06T15:05:33.794320Z
A source-named dated measurement, never combined with another source.
Source: pith, observed 2026-08-05T02:28:24.338817Z
Reference resolution
0 of 0 outbound references displayed
- verified exact0
- verified fuzzy0
- unresolved0
- parse uncertain0
- malformed identifier0
- metadata mismatch0
External citation measurements
17
pith, observed 2026-08-05T02:28:24.338817Z
Outbound references
No outbound reference observations are available for this paper version.
Pith citing papers
Observation 33e625ea-0526-43ec-8458-fbcb5767b8c6 · inbound
PPAAS: PVT and Pareto Aware Analog Sizing via Goal-conditioned Reinforcement Learning cites this paper.
PPAAS: PVT and Pareto Aware Analog Sizing via Goal-conditioned Reinforcement Learning AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis
Reference 27
- Resolution
- unresolved
- no resolver link, observed 2026-08-06T15:05:33.794320Z
Source-reported events for the cited work
Unavailable: canonical work link unavailable.
Observation b855a60c-f9d4-4c38-9470-6fe1fcb627b4 · inbound
SABLE: An NDA-Safe Closed-Loop LLM Framework for Analog Circuit Optimization in Industrial EDA Flows cites this paper.
SABLE: An NDA-Safe Closed-Loop LLM Framework for Analog Circuit Optimization in Industrial EDA Flows AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis
Reference 9
- Resolution
- verified exact
- local_arxiv, observed 2026-07-12T00:38:26.353187Z
Source-reported events for the cited work
No event found in the named queried sources as of 2026-08-08T06:32:00.761636+00:00.