Quantum Circuit Optimization Based on Dynamic Grouping and ZX-Calculus for Reducing 2-Qubit Gate Count

Guosheng Xu; Kai Chen; Maoduo Li; Shouli He; Wen Liu; Yangzhi Li

REVIEW 4 major objections 5 minor 40 references

Quantum Circuit Optimization Based on Dynamic Grouping and ZX-Calculus for Reducing 2-Qubit Gate Count

T0 review · 4 major / 5 minor · reviewed 2026-08-06 · deepseek-v4-flash

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Pith's one-line read By randomly grouping circuit layers into subcircuits and running a k-step lookahead rewrite search in ZX diagrams, this paper reports an average 18% reduction in two-qubit gates across benchmark circuits.

desk verdict The 18% reduction is plausible but not reproducible from the paper as written; a sign error in the annealing rule and missing parameters should be fixed before the numbers are cited. read the letter →

arxiv 2507.14434 v1 pith:WFTHJYLW submitted 2025-07-19 quant-ph

Kai Chen , Wen Liu , GuoSheng Xu , Yangzhi Li , Maoduo Li , Shouli He This is my paper · ORCID

classification quant-ph MSC 81P68 PACS 03.67.Lx

keywords quantumcircuitoptimizationZX-calculustwo-qubitgatereductionpartitioningk-steplookaheadsearchsimulatedannealingNISQClifford+Tcircuits

verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

Two-qubit gates are the dominant source of noise and hardware cost in current quantum circuits, so cutting their count is a direct route to more reliable NISQ computation. This paper proposes an optimizer that first splits the circuit into randomly sized groups of consecutive layers, converts each subcircuit into a ZX diagram, and runs a k-step lookahead search over equivalent ZX rewrites, choosing at each step the diagram with the fewest Hadamard edges and finally extracting the candidate with the fewest two-qubit gates. The optimized subcircuits are merged, redundant gates are removed by delayed gate placement, and simulated annealing restarts the grouping to escape local optima. On 25 benchmark circuits, the paper reports an average 18% reduction in two-qubit gates over the original circuits and a 4% average improvement over heuristic ZX-calculus methods, with larger advantages on some arithmetic circuits and further gains when starting from rule-based preprocessed circuits.

What carries the argument

The load-bearing object is the k-step lookahead search over ZX-diagram rewrites, guided by a two-stage cost model. ZX-calculus represents a quantum circuit as a graph of Z and X spiders connected by wires, and equivalence-preserving rewrite rules (node fusion, color change, local complementation, pivoting) allow structural simplification; circuits are recovered from simplified diagrams by a gflow-based extraction algorithm. The search generates a random set of candidate rules, applies them to produce candidate diagrams, scores intermediate diagrams by their number of Hadamard edges, and after k steps scores the fully extracted candidate by its two-qubit gate count. Around this core sit the randomized grouping by consecutive gate layers, the delayed gate placement that cancels redundant Hadamard gates introduced during extraction, and the simulated annealing loop that iterates over grouping configurations.

What would settle it

On a fixed benchmark circuit, enumerate all k-step ZX rewrite sequences up to depth k, extract each final diagram, and count two-qubit gates; if the exhaustive sequence often produces fewer two-qubit gates than the Hadamard-edge-pruned lookahead, the pruning proxy is falsified. Reproducing the ablation of Section 4.3.2, where removing lookahead makes two-qubit gate counts rise, would support the mechanism; observing the opposite would refute it.

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Extended reading notes

Core claim

The paper's central claim is that the locality bottleneck of ZX-calculus circuit optimization can be broken by randomized partitioning and anticipatory rule screening. Instead of applying single rewrite rules greedily to one large diagram, the optimizer partitions the circuit into subcircuits, explores several rule-application steps ahead, and uses the two-qubit gate count of the extracted circuit as the final selection criterion. The intermediate search is pruned by Hadamard-edge counts, and the merged result is cleaned with a delay-based gate-cancellation pass; a simulated annealing loop varies the partition to approach a global optimum. The paper reports that this pipeline reduces two-qubit gates by an average of 18% on the benchmark set, outperforms existing heuristic ZX methods by about 4% on average, and can improve upon a strong rule-based optimizer by up to 15% on specific circuits such as adder_8.

Load-bearing premise

The search assumes that minimizing the number of Hadamard edges at each intermediate lookahead step predicts which rewrite path will yield the fewest two-qubit gates after extraction, even though the paper concedes that ZX simplification can sometimes increase the extracted two-qubit count.

Editorial extensions

If this is right

If an 18% average reduction in two-qubit gates holds across benchmarks, NISQ circuits of the tested scale can be run with proportionally less two-qubit noise and lower hardware cost.
The lookahead mechanism prevents a known failure mode in which ZX simplification shrinks the diagram but increases the extracted two-qubit count; the ablations show that without lookahead the two-qubit gate count can rise.
Combining the method with rule-based preprocessing yields even larger two-qubit reductions (about 22% on average), indicating that partitioned ZX search finds structures that local rewrite rules miss.
The cost function is modular: reweighting it could target total gate count, depth, or other metrics, although the paper notes that depth and fidelity are harder to assess directly from ZX diagrams.
The paper acknowledges that rule matching scales poorly with circuit size, so applying the scheme to larger circuits will require more scalable rewrite-rule enumeration.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

The Hadamard-edge pruning premise is testable: an unpruned exhaustive-enumeration version of the same search would show whether this proxy discards genuinely better rewrite paths; the paper's own Section 4.2.1 admission that ZX simplification can increase extracted two-qubit counts makes this the natural stress point.
Because grouping lengths and candidate rules are drawn randomly and annealing accepts worse solutions probabilistically, runs may differ; adding fixed random seeds or deterministic diversity measures would let practitioners measure the variance of the reported 18% and 4% figures.
The reported edge on gf circuits and arithmetic circuits suggests the method exploits repeated modular structure at layer boundaries; testing on other structured circuit families (e.g., reversible adders and multipliers) would sharpen the boundary of where partitioning helps.
The k-step lookahead is effectively a hand-designed policy over ZX rewrites; replacing the random rule sampling with a learned policy could reduce the number of diagrams that must be extracted, since extraction cost dominates the search.

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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Desk Editor's Note

read the letter

Here's my read. The core idea is an engineering mashup: random layer grouping into subcircuits, ZX rewriting with k-step lookahead, delayed placement at merge time, and simulated annealing over group configurations. Nothing in that list is new, but the particular combination, and the benchmark results, are. The paper is honest about what it builds on: PyZX and R2Q are cited and used. The evaluation is substantial—25 benchmark circuits, comparisons against Nam, VOQC, Qiskit, Quartz, PyZX, and R2Q, plus ablation studies for each module. The 18% average two-qubit reduction matching Nam, and 4% average gain over R2Q, are useful if true. I give the authors credit for acknowledging that ZX extraction can hurt two-qubit counts and that small circuits are not improved.

The soft spots are real. The simulated-annealing step in §3.5 has a sign error: Δ is defined as F2q(QC) − F2q(QC′), so a genuine improvement gives Δ > 0, but the text says Δ ≤ 0 is accepted as best. That's backwards. It's probably a typo, but it makes the described algorithm literally unimplementable as written. Second, the method is stochastic but not fully specified: the rule-sampling number j is never defined, and Eq. (7) uses undefined a and n(r). No random seed, no code, no variance reporting. Hyperparameters are tuned on the same benchmarks they're evaluated on. Third, the numbers are inconsistent: abstract says 4% average improvement over heuristic ZX, conclusion says 3%; the 'up to 25%' claim appears to refer to total gate count in one place and two-qubit count in another. None of this proves the results are wrong, but as published the central claim cannot be independently checked.

The Hadamard-edge proxy concern you flagged is minor; the authors explicitly note the proxy's imperfection in §4.2.1.

Who should care: people working on ZX-calculus-based compilation or benchmark-driven circuit optimization. It is an incremental step, not a new framework. If the authors fix the notation, release code and seeds, and correct the sign, I'd take the numbers more seriously. As is, I wouldn't cite it, but I'd send it to a competent referee rather than desk-reject: the idea is sound, the experiments are extensive, and the problems are fixable.

Referee Report

4 major / 5 minor

Summary. The manuscript proposes a quantum circuit optimization framework that combines randomized dynamic grouping of circuits, ZX-calculus rewriting with a k-step lookahead search, a delayed gate placement post-processing step, and a simulated annealing outer loop. The reported experimental claims are a mean 18% reduction in two-qubit gates relative to the original circuits, a 4% mean improvement over the heuristic ZX-based method R2Q, and favorable comparisons with Nam, VOQC, Qiskit, and Quartz on a 25-circuit benchmark set. The central contribution is a practical engineering recipe for integrating partitioning with lookahead rule selection in ZX-based optimization, rather than a new mathematical result about the ZX-calculus. The appendix-level details indicate that the method is built on PyZX and R2Q, and the main numerical tables are plausibly consistent with the claimed average improvements.

Significance. If the claims are reproducible, the paper would provide a practically useful increment over existing ZX-calculus-based two-qubit gate optimizers: the idea of partitioning circuits to enlarge the rewrite-rule search space and using a k-step lookahead to filter rewrites by the extracted two-qubit count is sensible, and the reported 18% average reduction is comparable to the Nam optimizer while beating R2Q by about 4 percentage points. The paper also honestly acknowledges known failure modes of ZX extraction, such as increased two-qubit counts on small circuits and inflated single-qubit gate counts. However, the significance is currently limited by reproducibility gaps in the stochastic pipeline, inconsistencies among the headline numbers in the abstract, body, and conclusion, and the absence of any variance or sensitivity analysis for a randomized algorithm. These issues must be resolved before the empirical claims can be independently checked.

major comments (4)

[§3.5, step (4)] The simulated annealing acceptance rule is internally inconsistent. The text defines Δ = F2q(QC) − F2q(QC′), so a circuit with fewer two-qubit gates gives Δ > 0, yet the manuscript states that Δ ≤ 0 is an improvement and is accepted while Δ > 0 is worse and accepted only probabilistically. With the stated sign, every improving move would be treated as a worse move, and the monotone decreases shown in the §4.3 ablation curves could not be produced by a literal implementation. This is a load-bearing error because the final two-qubit counts depend on the SA acceptance rule; it must be corrected and the acceptance probability must be written explicitly with the correct sign.
[§3.2.2, Eq. (7); §3.3.2, Eq. (10)] The stochastic pipeline used to generate the headline numbers is not fully specified. Eq. (7) uses the undefined symbols a and n(r), and §3.3.2 never defines j, the number of randomly sampled rules per lookahead step, even though Eq. (10) and the surrounding text depend on j. No random seed, cooling schedule, initial temperature law, or maximum iteration count is given, and §4.1 states only that parameters were set by trial-and-error. Because the average 18% reduction and 4% improvement over R2Q are empirical statements about this specific procedure, the absence of these definitions makes the central results unreproducible from the paper description alone.
[Abstract; §5; Tables 1 and 2] The headline numbers are not mutually consistent. The abstract claims an average 18% reduction, 'up to 25% reduction, especially on gf circuits', and a 4% average improvement over heuristic ZX methods, while the conclusion states average reductions of 8% compared with delay-placement-only optimization and 3% compared with ZX-based heuristic methods. Section 4.2.1 reports up to 41% reduction for vbe_adder_3, not the 25% quoted in the abstract, and the 25% figure appears to refer to total gate count rather than two-qubit gates. The authors should reconcile these statements and state one unambiguous set of primary claims with the exact benchmark subsets to which they apply.
[§4.1 and §4.3] The experiments provide no statistical characterization of a stochastic optimization algorithm. The partitioning, rule sampling, and simulated annealing are all randomized, yet each benchmark is reported as a single number with no repeated runs, standard deviations, or seed information. Since the values of b, k, and T were chosen by trial-and-error on the evaluation benchmarks, the reported improvements could reflect favorable parameter selection rather than a robust algorithmic advantage. The authors should report means and spreads over multiple seeds and, ideally, a small sensitivity analysis over the main hyperparameters.

minor comments (5)

[Eq. (15)] Equation (15) contains a typo: the second concatenated list begins with g^{c1}_2, but it should be g^{c2}_1 or an analogous enumeration of the gates of c2.
[Eq. (11)] The definition of FE(I^1_j) is garbled; the notation 'e + 1 ∈ E' inside the formula is not a well-formed counting condition. The intended meaning appears to be a count of Hadamard edges, and the equation should be rewritten with an indicator function.
[§4.2.1] The sentence 'As shown in Table 1,' after the discussion of small circuits appears to be a dangling fragment; a complete observation or cross-reference should follow it.
[§5] The conclusion mentions experiments on 'randomly generated instances', but Section 4 describes only the 25 Nam-derived benchmark circuits; this discrepancy should be removed or the missing experiments should be added.
[§4.1] The statement that parameters were set via 'trial-and-error and experience' should be accompanied by the actual ranges explored and, ideally, a table of the final values for b, k, T, j, p, and the cooling schedule.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the reported gate-count reductions are empirical benchmark measurements of an optimization procedure, not derivations that reduce to their inputs.

full rationale

The paper's central claims are experimental: it runs a stochastic partitioning plus ZX-lookahead optimizer on 25 benchmark circuits and reports measured two-qubit gate counts after extraction. There is no step in which a quantity defined in terms of the target result is presented as a prediction. The k-step lookahead selects intermediate diagrams by Hadamard-edge count, but the final selection is explicitly re-evaluated by the extracted two-qubit gate count (Eq. 13 and Section 3.3.2), so the reported reduction is not forced by the proxy. The method is implemented on PyZX and R2Q, but R2Q is an external baseline (Staudacher et al.), not prior work by these authors, and the 4% improvement over R2Q is a measured comparison rather than a self-citation. Parameters such as b, k, and T are stated to have been set by trial-and-error (Section 4.1), which is a benchmark-tuning reproducibility concern, not circular reasoning. The sign convention issue in the simulated-annealing acceptance rule (Section 3.5) and the undefined random quantities in Eqs. (6)-(7) also affect reproducibility, but they are not instances of the paper's outputs being equivalent to its inputs by construction. No load-bearing self-citation, imported uniqueness theorem, or ansatz-smuggling citation appears in the derivation chain.

Assumptions & free parameters 6 free parameters · 4 assumptions · 0 invented entities

The framework introduces no new physical entities. Its main intellectual costs are tuned hyperparameters and reliance on external ZX-tooling correctness. The reported average reductions are empirical measurements, not derivations.

free parameters (6)

b (minimum group size) = 5
Set by trial-and-error in Section 4.1; used in Eq. 6 and controls subcircuit granularity.
k (lookahead steps) = 4
Set by trial-and-error in Section 4.1; controls depth of rule exploration. Figure 24 shows k=4 or 5 is best on barenco_tof_4, while k=6 is best on qcla_adder_10.
T (simulated annealing temperature) = 300
Set by trial-and-error in Section 4.1; controls acceptance probability for worse solutions.
j (number of random rules sampled per lookahead step) = not specified
Used in Eq. 10 as i~U(1,N_R) repeated j times, but j is never given in the paper.
a and n(r) (group length range parameters) = undefined
Eq. 7 uses random(a, d/n(r)-1) without defining a or n(r), leaving the grouping scheme under-specified.
p (no-improvement tolerance) = 5
Termination condition in Sections 3.3.2 and 3.5; number of consecutive iterations without improvement allowed before stopping.

assumptions (4)

standard math ZX-calculus rewrite rules preserve circuit equivalence, including completeness for Clifford+T.
Used throughout Section 3.3 to justify that simplified diagrams represent equivalent circuits; cited to Backens [27] and Ng et al. [28].
domain assumption PyZX's To_Graph and Extract functions faithfully convert circuits to ZX diagrams and back.
The whole pipeline relies on PyZX [30] for conversion and extraction; the paper does not verify these implementations.
standard math Independently optimizing consecutive subcircuits and concatenating them preserves global circuit equivalence.
Used implicitly in Section 3.4 when merging optimized subcircuits; true if each subcircuit is a unitary operator and the layer boundaries are exact.
domain assumption The benchmark set and the two-qubit gate count objective are representative of NISQ circuit optimization value.
Evaluation on 25 circuits from Nam [15]; no formal argument that the observed gains generalize beyond these benchmarks.

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Cite this review

Pith. "Pith review of Quantum Circuit Optimization Based on Dynamic Grouping and ZX-Calculus for Reducing 2-Qubit Gate Count." pith.science (2026). https://pith.science/paper/WFTHJYLW

@misc{pith2026250714434,
  author       = {Pith},
  title        = {Pith review of: Quantum Circuit Optimization Based on Dynamic Grouping and ZX-Calculus for Reducing 2-Qubit Gate Count},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/WFTHJYLW}},
  note         = {Machine review of arXiv:2507.14434}
}

read the original abstract

In the noisy intermediate-scale quantum (NISQ) era, two-qubit gates in quantum circuits are more susceptible to noise than single-qubit gates. Therefore, reducing the number of two-qubit gates is crucial for improving circuit efficiency and reliability. As quantum circuits scale up, the optimization search space becomes increasingly complex, leading to challenges such as low efficiency and suboptimal solutions. To address these issues, this paper proposes a quantum circuit optimization approach based on dynamic grouping and ZX-calculus. First, a random strategy-based dynamic grouping method partitions the circuit into multiple subcircuits. Second, a ZX-calculus guided k-step lookahead search performs equivalent subcircuit filtering to minimize two-qubit gate counts. Third, a delay-aware placement method optimizes the recombined circuit to reduce the overall gate count. Finally, simulated annealing iteratively updates the grouping strategy to achieve an optimized two-qubit gate count. Experimental results on benchmark datasets demonstrate the effectiveness and superiority of the proposed method in reducing two-qubit gates. Compared to the original circuits, the approach achieves an average reduction of 18% in two-qubit gates. It outperforms classical methods with up to 25% reduction, especially on gf circuits, and shows a 4% average improvement over heuristic ZX-calculus-based methods, validating its efficiency.

Figures

Figures reproduced from arXiv: 2507.14434 by the authors.

**Figure 1.** gate transformation These optimizations exploit the algebraic properties of quantum gates and their representations—such as matrix operations and ZX calculus—to simplify circuit structures, thereby enhancing computational efficiency and reducing error accumulation. The permutations and combinations of various rule-based transformations can produce a multitude of functionally equivalent circuits, with the total gate… view at source ↗

**Figure 2.** ZX spider nodes [PITH_FULL_IMAGE:figures/full_fig_p008_2.png] view at source ↗

**Figure 3.** Correspondence between Quantum Gates and ZX Nodes [PITH_FULL_IMAGE:figures/full_fig_p008_3.png] view at source ↗

Figures from the paper (21 more)

**Figure 4.** Figure 4: Transform the circuit into a ZX diagram 2.2.2 ZX rules ZX calculus defines a set of graphical transformation rules that allow for simplification and reasoning based on fundamental principles of quantum mechanics and quantum computation. In ZX diagrams, only the nodes …

**Figure 5.** Figure 5: Fundamental Rules of the ZX Calculus a ∈ g, the local complement of g with respect to a, denoted g ∗ a, is a graph with the same vertices and edges as g, except that the neighborhood of a is complemented. If the phase of spider a in g ∗ a is ±π/2, then this phase is su…

**Figure 6.** Figure 6: local complementation rule The pivoting rule can be interpreted as a sequence of three local complementations applied to an edge (u, v) ∈ E. In the resulting pivoted graph g ∧ uv, two vertices from distinct sets A, B, or C are connected if and only if they were not con…

**Figure 7.** Figure 7: pivot rule A ZX diagram can be simplified into a more compact structure through a sequence of ZX calculus transformations. First, the fusion rule (fu) is applied multiple times to merge adjacent nodes of the same type, thereby reducing the overall node count. Next, the…

**Figure 8.** Figure 8: An Example of Optimization Using ZX Diagrams [PITH_FULL_IMAGE:figures/full_fig_p010_8.png]

**Figure 9.** Figure 9: An Example of Extracting ZX Diagrams 10 [PITH_FULL_IMAGE:figures/full_fig_p010_9.png]

**Figure 10.** Figure 10: Framework Diagram of Quantum Circuit Optimization via Dynamic Grouping and ZX Calculus [PITH_FULL_IMAGE:figures/full_fig_p011_10.png]

**Figure 11.** Figure 11: Dynamic Circuit Grouping 3.2.1 Circuit Layer Partitioning For each gate gi in the quantum circuit QC(Q, G), the layer index lgi must be computed. Gates with the same layer index are grouped into the same layer set L. To assign layers, the depth of each quantum gate is…

**Figure 12.** Figure 12: Example of Circuit Grouping 3.3 Sub-Circuit Equivalence Screening Method Based on ZX Calculus and k-Step Lookahead Search Following dynamic grouping, circuit QC is partitioned into N_S sub-circuits QCs i (i ∈ 1, 2, . . . , NS). To optimize these sub-circuits for equiv…

**Figure 13.** Figure 13: Subcircuit Optimization and Selection Flow [PITH_FULL_IMAGE:figures/full_fig_p014_13.png]

**Figure 14.** Figure 14: k-Step Look-Ahead Equivalence Selection The functions LCH(G) [32]and PH(G) [32] are used to identify matchable nodes for local complementation and phase rules in diagram G. Applying these to the preprocessed diagram D0 yields rule match sets RLCH and RP H, respective…

**Figure 15.** Figure 15: Example of Equivalence Selection Based on [PITH_FULL_IMAGE:figures/full_fig_p017_15.png]

**Figure 16.** Figure 16: Circuit Synthesis [PITH_FULL_IMAGE:figures/full_fig_p018_16.png]

**Figure 17.** Figure 17: Example of Circuit Synthesis Optimization [PITH_FULL_IMAGE:figures/full_fig_p018_17.png]

**Figure 18.** Figure 18: Iterative optimization flow for quantum circuits [PITH_FULL_IMAGE:figures/full_fig_p018_18.png]

**Figure 19.** Figure 19: Optimization Comparison of Gate Count (rule-based) [PITH_FULL_IMAGE:figures/full_fig_p021_19.png]

**Figure 20.** Figure 20: Optimization Comparison of Gate Count (ZX calculus-based) [PITH_FULL_IMAGE:figures/full_fig_p023_20.png]

**Figure 21.** Figure 21: Impact Analysis of Circuit Grouping 4.3.2 Effectiveness Verification of Lookahead Strategy To assess the impact of k-step lookahead, we compare optimization results with (k-step) and without (no k-step) the lookahead mechanism. Both settings utilize partitioning and d…

**Figure 22.** Figure 22: Comparison of the Impact of Lookahead Strategies [PITH_FULL_IMAGE:figures/full_fig_p025_22.png]

**Figure 23.** Figure 23: Impact Assessment of Deferred Optimization Strategies [PITH_FULL_IMAGE:figures/full_fig_p025_23.png]

**Figure 24.** Figure 24: Comparison of Two-Qubit Gate Counts under Different Lookahead Steps [PITH_FULL_IMAGE:figures/full_fig_p026_24.png]

Discussion (0). Continue with ORCID to comment.

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Pith tools

Reviewed August 6, 2026 · model on record in the stance chip above.

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