Guido Masera

Identifiers

• name variant Guido Masera 0.60 · backfill

Papers (8)

1. A Multi-Kernel Multi-Code Polar Decoder Architecture cs.AR · 2018 · author #3
2. A joint communication and application simulator for NoC-based SoCs cs.AR · 2013 · author #3
3. A Flexible LDPC code decoder with a Network on Chip as underlying interconnect architecture cs.AR · 2011 · author #2
4. Improving Network-on-Chip-based turbo decoder architectures cs.AR · 2011 · author #2
5. A Novel VLSI Architecture of Fixed-complexity Sphere Decoder cs.IT · 2010 · author #2
6. VLSI Architectures for WIMAX Channel Decoders cs.AR · 2010 · author #2
7. Turbo NOC: a framework for the design of Network On Chip based turbo decoder architectures cs.AR · 2009 · author #2
8. Decoding the Golden Code: a VLSI design cs.AR · 2007 · author #2

Mentions

• 1301.1465 #3 · backfill · confidence 0.70 Guido Masera
• 1105.2624 #2 · backfill · confidence 0.70 Guido Masera
• 1105.1014 #2 · backfill · confidence 0.70 Guido Masera
• 1006.4030 #2 · backfill · confidence 0.70 Guido Masera
• 1001.4694 #2 · backfill · confidence 0.70 Guido Masera
• 0909.1876 #2 · backfill · confidence 0.70 Guido Masera
• 0711.2383 #2 · backfill · confidence 0.70 Guido Masera

Frequent Coauthors

• Carlo Condo 3 shared papers
• Maurizio Martina 3 shared papers
• Amer Baghdadi 1 shared papers
• Barbara Cerato 1 shared papers
• Bin Wu 1 shared papers
• Emanuele Viterbo 1 shared papers
• Gabriele Coppolino 1 shared papers
• Warren J. Gross 1 shared papers