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Paolo Gorlani

Identifiers

  • name variant Paolo Gorlani 0.60 · backfill

Papers (1)

  1. High Level Synthesis Implementation of a Three-dimensional Systolic Array Architecture for Matrix Multiplications on Intel Stratix 10 FPGAs cs.AR · 2021 · author #1

Mentions

  • 2110.11521 #1 · arxiv_oai · confidence 0.70 Paolo Gorlani

Frequent Coauthors