MailoHLS combines LLM semantic reasoning and GNN structural modeling with multi-adapter PEFT and Pareto optimization to produce near-Pareto-optimal HLS pragma configurations, reporting up to 12.42x latency speedup on seen kernels and 10.2x on unseen ones.
Hlspilot: Llm-based high-level synthesis
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UNVERDICTED 2representative citing papers
ChipSeek is a hierarchical-reward reinforcement learning framework with Curriculum-Guided Dynamic Policy Optimization that integrates EDA simulator feedback to improve LLM-generated RTL code on both functional correctness and PPA metrics.
citing papers explorer
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MailoHLS: Multi-Adapter Structure-Aware Learning for Pareto-Driven HLS Pragma Optimization
MailoHLS combines LLM semantic reasoning and GNN structural modeling with multi-adapter PEFT and Pareto optimization to produce near-Pareto-optimal HLS pragma configurations, reporting up to 12.42x latency speedup on seen kernels and 10.2x on unseen ones.
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ChipSeek: Optimizing Verilog Generation via EDA-Integrated Reinforcement Learning
ChipSeek is a hierarchical-reward reinforcement learning framework with Curriculum-Guided Dynamic Policy Optimization that integrates EDA simulator feedback to improve LLM-generated RTL code on both functional correctness and PPA metrics.