SPAC automates FPGA switch generation via protocol-architecture co-design and design-space exploration, cutting LUT/BRAM use by 55%/53% and latency by 7.8-38.4% versus fixed architectures across sensor, HFT, and datacenter workloads.
P4thls: A templated hls framework to automate efficient mapping of p4 data-plane applica- tions to fpgas
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SPAC: Automating FPGA-based Network Switches with Protocol Adaptive Customization
SPAC automates FPGA switch generation via protocol-architecture co-design and design-space exploration, cutting LUT/BRAM use by 55%/53% and latency by 7.8-38.4% versus fixed architectures across sensor, HFT, and datacenter workloads.