A distributed arithmetic algorithm for CMVM operations on FPGAs reduces area by up to one third and latency for quantized neural networks, integrated into hls4ml.
Technical Design Report for the Phase-II Upgrade of the ATLAS TDAQ System
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Reviews precision timing integration in LHC upgrades and discusses a possible shift to triggerless detectors enabled by timing and networking, with reflections on physics benefits.
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da4ml: Distributed Arithmetic for Real-time Neural Networks on FPGAs
A distributed arithmetic algorithm for CMVM operations on FPGAs reduces area by up to one third and latency for quantized neural networks, integrated into hls4ml.
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Towards triggerless four-dimensional detectors for High Energy Physics collider experiments
Reviews precision timing integration in LHC upgrades and discusses a possible shift to triggerless detectors enabled by timing and networking, with reflections on physics benefits.