PrISM uses a Sampled History Queue to correlate row samples across windows, solving the non-selection problem in probabilistic RowHammer mitigation and cutting slowdown from 10.7% to 1.5% at threshold 250 versus prior methods.
Citadel: Rethinking memory allocation to safeguard against inter-domain rowhammer exploits
3 Pith papers cite this work. Polarity classification is still indexing.
3
Pith papers citing it
years
2026 3representative citing papers
COMPOSE is a timing-driven composable CGRA architecture that fuses cross-iteration operations and defers registration to deliver 1.6x performance and 2.9x EDP gains over prior CGRA designs for recurrence-bound loops.
MixFP4 extends NVFP4 by adaptively selecting between two FP4 micro-formats per block using repurposed scale sign bits and a unified E2M2 compute path, claiming better accuracy than standard NVFP4 at 3.1% area and 1.5% power overhead.
citing papers explorer
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Loaded Dice: Solving the Non-Selection Problem for Scalable Probabilistic RowHammer Defense
PrISM uses a Sampled History Queue to correlate row samples across windows, solving the non-selection problem in probabilistic RowHammer mitigation and cutting slowdown from 10.7% to 1.5% at threshold 250 versus prior methods.
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COMPOSE: Static Timing-driven Composable Reconfigurable Architecture for Accelerating Recurrence-Bound Loops
COMPOSE is a timing-driven composable CGRA architecture that fuses cross-iteration operations and defers registration to deliver 1.6x performance and 2.9x EDP gains over prior CGRA designs for recurrence-bound loops.
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MixFP4: Enhancing NVFP4 with Adaptive FP4/INT4 Block Representations
MixFP4 extends NVFP4 by adaptively selecting between two FP4 micro-formats per block using repurposed scale sign bits and a unified E2M2 compute path, claiming better accuracy than standard NVFP4 at 3.1% area and 1.5% power overhead.