Annealing-optimized Ag/HZO memristors demonstrate artificial neurons with TTFS, spike-count, and firing-rate coding modes using minimal circuitry.
Title resolution pending
2 Pith papers cite this work. Polarity classification is still indexing.
2
Pith papers citing it
citation-role summary
background 1
citation-polarity summary
verdicts
UNVERDICTED 2roles
background 1polarities
background 1representative citing papers
CMOS field-programmable spiking neural network with LIF neurons, integrated VCOs, and on-chip FPGA implements hardware reservoir computing, demonstrated via FORCE learning and NARMA10 tasks with 21.7 pJ/pulse energy and 540 NAND2 area per neuron.
citing papers explorer
-
Multiple spiking functionalities in annealing-optimized Ag/Hf$_{0.5}$Zr$_{0.5}$O$_2$-based memristive neurons
Annealing-optimized Ag/HZO memristors demonstrate artificial neurons with TTFS, spike-count, and firing-rate coding modes using minimal circuitry.
-
CMOS Implementation of Field Programmable Spiking Neural Network for Hardware Reservoir Computing
CMOS field-programmable spiking neural network with LIF neurons, integrated VCOs, and on-chip FPGA implements hardware reservoir computing, demonstrated via FORCE learning and NARMA10 tasks with 21.7 pJ/pulse energy and 540 NAND2 area per neuron.