CHESSY provides open-source hybrid co-emulation by accelerating digital subsystems on FPGA while synchronizing via JTAG with SystemC virtual platforms, delivering up to 2500x speedup over RTL simulation.
Integrating SystemC-AMS power modeling with a RISC-V ISS for virtual prototyping of battery-operated embedded devices
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Late Breaking Results: CHESSY: Coupled Hybrid Emulation with SystemC-FPGA Synchronization
CHESSY provides open-source hybrid co-emulation by accelerating digital subsystems on FPGA while synchronizing via JTAG with SystemC virtual platforms, delivering up to 2500x speedup over RTL simulation.