AI Engines enable larger low-latency neural networks for extreme-edge scientific computing on FPGAs than programmable logic, via a new latency-adjusted resource equivalence metric and tailored optimizations.
hls4ml: An Open-Source Codesign Workflow to Empower Scientific Low-Power Machine Learning Devices
5 Pith papers cite this work. Polarity classification is still indexing.
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HGQ-LUT delivers a practical LUT-aware training framework with new tensor-based layers, heterogeneous quantization, and a resource surrogate that automates accuracy-efficiency trade-offs for FPGA DNN inference.
Neural networks integrated into silicon sensor front-end electronics can regress charged-particle hit positions and angles with calibrated uncertainties from single-layer data while satisfying hardware constraints on precision, latency, and area.
A distributed arithmetic algorithm for CMVM operations on FPGAs reduces area by up to one third and latency for quantized neural networks, integrated into hls4ml.
WaveDriver is a laser guide star AO concept whose initial simulations indicate it may be required to meet HWO primary mirror segment stability and low-order wavefront stability requirements.
citing papers explorer
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Design Rules for Extreme-Edge Scientific Computing on AI Engines
AI Engines enable larger low-latency neural networks for extreme-edge scientific computing on FPGAs than programmable logic, via a new latency-adjusted resource equivalence metric and tailored optimizations.
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HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference
HGQ-LUT delivers a practical LUT-aware training framework with new tensor-based layers, heterogeneous quantization, and a resource surrogate that automates accuracy-efficiency trade-offs for FPGA DNN inference.
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On-chip probabilistic inference for charged-particle tracking at the sensor edge
Neural networks integrated into silicon sensor front-end electronics can regress charged-particle hit positions and angles with calibrated uncertainties from single-layer data while satisfying hardware constraints on precision, latency, and area.
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da4ml: Distributed Arithmetic for Real-time Neural Networks on FPGAs
A distributed arithmetic algorithm for CMVM operations on FPGAs reduces area by up to one third and latency for quantized neural networks, integrated into hls4ml.
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WaveDriver: a Laser Guide Star AO System for HWO
WaveDriver is a laser guide star AO concept whose initial simulations indicate it may be required to meet HWO primary mirror segment stability and low-order wavefront stability requirements.