CODO automates comprehensive dataflow optimization on FPGAs, achieving 1.45x-4.52x speedups on kernels and up to 33.8x on DNN models over state-of-the-art frameworks.
Allo: A programming model for composable accelerator design
2 Pith papers cite this work. Polarity classification is still indexing.
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2026 2verdicts
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Workshop report recommends NSF investments in AI-EDA collaboration, data infrastructure, compute resources, and workforce development to accelerate hardware design.
citing papers explorer
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CODO: An Automated Compiler for Comprehensive Dataflow Optimization
CODO automates comprehensive dataflow optimization on FPGAs, achieving 1.45x-4.52x speedups on kernels and up to 33.8x on DNN models over state-of-the-art frameworks.
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Report for NSF Workshop on AI for Electronic Design Automation
Workshop report recommends NSF investments in AI-EDA collaboration, data infrastructure, compute resources, and workforce development to accelerate hardware design.