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Fast and Efficient Asynchronous Neural Computation with Adapting Spiking Neural Networks

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arxiv 1609.02053 v1 pith:R2FNJFYS submitted 2016-09-07 cs.NE

classification cs.NE
keywords neuralspikingneuronscomputationnetworknetworksasnnasynchronous
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Biological neurons communicate with a sparing exchange of pulses - spikes. It is an open question how real spiking neurons produce the kind of powerful neural computation that is possible with deep artificial neural networks, using only so very few spikes to communicate. Building on recent insights in neuroscience, we present an Adapting Spiking Neural Network (ASNN) based on adaptive spiking neurons. These spiking neurons efficiently encode information in spike-trains using a form of Asynchronous Pulsed Sigma-Delta coding while homeostatically optimizing their firing rate. In the proposed paradigm of spiking neuron computation, neural adaptation is tightly coupled to synaptic plasticity, to ensure that downstream neurons can correctly decode upstream spiking neurons. We show that this type of network is inherently able to carry out asynchronous and event-driven neural computation, while performing identical to corresponding artificial neural networks (ANNs). In particular, we show that these adaptive spiking neurons can be drop in replacements for ReLU neurons in standard feedforward ANNs comprised of such units. We demonstrate that this can also be successfully applied to a ReLU based deep convolutional neural network for classifying the MNIST dataset. The ASNN thus outperforms current Spiking Neural Networks (SNNs) implementations, while responding (up to) an order of magnitude faster and using an order of magnitude fewer spikes. Additionally, in a streaming setting where frames are continuously classified, we show that the ASNN requires substantially fewer network updates as compared to the corresponding ANN.

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  1. Spiking Neural Networks for Inference and Learning: A Memristor-based Design Perspective

    cs.ET 2019-09 unverdicted novelty 2.0 of 10

    A review of memristor-compatible learning for spiking neural networks, centered on device-aware three-factor plasticity rules with pulse-count updates derived from a fitted RRAM conductance model.

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