Recognition: unknown
Is error detection helpful on IBM 5Q chips ?
read the original abstract
This paper reports on experiments realized on several IBM 5Q chips which show evidence for the advantage of using error detection and fault-tolerant design of quantum circuits. We show an average improvement of the task of sampling from states that can be fault-tolerantly prepared in the $[[4,2,2]]$ code, when using a fault-tolerant technique well suited to the layout of the chip. By showing that fault-tolerant quantum computation is already within our reach, the author hopes to encourage this approach.
This paper has not been read by Pith yet.
Forward citations
Cited by 2 Pith papers
-
Fault-tolerant quantum computation with a neutral atom processor
A 256-atom neutral ytterbium processor demonstrates fault-tolerant entanglement of 24 logical qubits and runs Bernstein-Vazirani on 28 logical qubits with better-than-physical error rates using erasure conversion.
-
Co-Designing Error Mitigation and Error Detection for Logical Qubits
Optimized QED intervals plus steady-state extraction enable PEC+QED to deliver 2-11x lower error than PEC alone on Iceberg codes for QAOA.
discussion (0)
Sign in with ORCID, Apple, or X to comment. Anyone can read and Pith papers without signing in.