Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis

Caleb Donovick; Clark Barrett; Jackson Melchert; Kathleen Feng; Mark Horowitz; Pat Hanrahan; Priyanka Raina; Ross Daly

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Automated Design Space Exploration of CGRA Processing Element Architectures using Frequent Subgraph Analysis

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arxiv 2104.14155 v1 pith:U24PDHGP submitted 2021-04-29 cs.AR

Jackson Melchert , Kathleen Feng , Caleb Donovick , Ross Daly , Clark Barrett , Mark Horowitz , Pat Hanrahan , Priyanka Raina This is my paper · ORCID

classification cs.AR

keywords applicationcgraprocessingspecializedarchitecturearchitecturesautomateddomain

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The architecture of a coarse-grained reconfigurable array (CGRA) processing element (PE) has a significant effect on the performance and energy efficiency of an application running on the CGRA. This paper presents an automated approach for generating specialized PE architectures for an application or an application domain. Frequent subgraphs mined from a set of applications are merged to form a PE architecture specialized to that application domain. For the image processing and machine learning domains, we generate specialized PEs that are up to 10.5x more energy efficient and consume 9.1x less area than a baseline PE.

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