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HyPFuzz: Formal-Assisted Processor Fuzzing

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arxiv 2304.02485 v3 pith:UBZFJRPJ submitted 2023-04-05 cs.CR

classification cs.CR
keywords hypfuzzvulnerabilitiesformalfuzzersprocessorsfuzzfuzzerprocessor
verification ladder T0 review T1 audit T2 compute T3 formal

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abstract

Recent research has shown that hardware fuzzers can effectively detect security vulnerabilities in modern processors. However, existing hardware fuzzers do not fuzz well the hard-to-reach design spaces. Consequently, these fuzzers cannot effectively fuzz security-critical control- and data-flow logic in the processors, hence missing security vulnerabilities. To tackle this challenge, we present HyPFuzz, a hybrid fuzzer that leverages formal verification tools to help fuzz the hard-to-reach part of the processors. To increase the effectiveness of HyPFuzz, we perform optimizations in time and space. First, we develop a scheduling strategy to prevent under- or over-utilization of the capabilities of formal tools and fuzzers. Second, we develop heuristic strategies to select points in the design space for the formal tool to target. We evaluate HyPFuzz on five widely-used open-source processors. HyPFuzz detected all the vulnerabilities detected by the most recent processor fuzzer and found three new vulnerabilities that were missed by previous extensive fuzzing and formal verification. This led to two new common vulnerabilities and exposures (CVE) entries. HyPFuzz also achieves 11.68$\times$ faster coverage than the most recent processor fuzzer.

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Cited by 1 Pith paper

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  1. Security Properties for Open-Source Hardware Designs

    cs.CR 2024-12 conditional novelty 6.0 of 10

    A new open-source benchmark provides SystemVerilog Assertion properties that detect known security bugs in four popular open-source processor designs.

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