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REVIEW 4 major objections 6 minor 1 cited by

Moving Forward: A Review of Autonomous Driving Software and Hardware Systems

T0 review · 4 major / 6 minor · reviewed 2026-08-12 · deepseek-v4-flash

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Pith's one-line read The paper argues that no single hardware type can efficiently run the full autonomous-driving stack, so future accelerators will be heterogeneous: CPUs and GPUs plus task-specific cores and programmable FPGAs or CGRAs.

desk verdict A competent, useful survey whose original CPU/GPU benchmark is too under-specified to carry the heterogeneity thesis; worth refereeing with requests for methodology and reframing. read the letter →

arxiv 2411.10291 v1 pith:SAAVA7D5 submitted 2024-11-15 cs.RO

Xu Wang , Mohammad Ali Maleki , Muhammad Waqar Azhar , Pedro Trancoso This is my paper · ORCID
classification cs.RO
keywords autonomousdrivinghardwareaccelerationheterogeneousarchitectureprocessing-in-memoryend-to-endmodelsGPUvsCPUperformancedeeplearningsystemsself-drivingSoCs
verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This paper is a survey of autonomous-driving software and hardware with a forward-looking argument: the compute platform that will support high-level autonomy cannot be a single device type. Using three end-to-end driving models (TransFuser, InterFuser, MILE) measured on four CPUs and four GPUs, it reports that nearly all CPUs fall below the 10 FPS real-time bar while GPUs deliver higher throughput and better FPS/W. From the wide variation in arithmetic intensity across tasks and layers, it concludes that one kind of hardware is suboptimal and that future self-driving accelerators will be heterogeneous—general-purpose CPUs and GPUs combined with task-specific PIM-based cores and programmable FPGAs or CGRAs. A sympathetic reader would care because the choice of accelerator architecture directly determines whether level-4/5 autonomy can meet latency, energy, and adaptability requirements in a vehicle that must last 10–15 years.

What carries the argument

The argument is carried by workload-diversity characterization. The paper defines arithmetic intensity (FLOPs per byte, equivalently FLOPs per memory operation) for the three end-to-end benchmarks and plots layer-level intensity for InterFuser (Fig. 9), showing some layers are compute-bound and others memory-bound. This intensity spread is the mechanism that motivates heterogeneous accelerators and processing-in-memory, since memory-bound layers benefit from computation placed near or inside DRAM while compute-bound layers benefit from parallel SIMD-style engines.

What would settle it

A head-to-head study that runs the full modular stack (perception, prediction, planning) alongside the three end-to-end models on the same four CPUs and four GPUs, with a sourced real-time threshold, and finds a single device class meeting all latency and energy budgets would directly weaken the claim that heterogeneous hardware is required.

Watch

Extended reading notes

Core claim

The central claim is that the future of self-driving accelerators lies in heterogeneous architectures rather than a single dominant device class. The paper reaches this through workload diversity: the evaluated end-to-end models have markedly different parameter counts, FLOPs, and arithmetic intensities, and within a single model such as InterFuser, individual layers range over several orders of magnitude in FLOPs-per-memory-operation. It reports that on the four CPU systems almost none of the end-to-end models can sustain the required 10 FPS, while GPUs both meet and exceed it with better energy efficiency, and it argues that no single hardware type can be optimal across such a spread. The conclusion is therefore a multi-core SoC that mixes general-purpose CPUs/GPUs, task-specific accelerators including processing-in-memory cores, and programmable components such as FPGAs or CGRAs to preserve long-term adaptability.

Load-bearing premise

The argument rests on assuming the three end-to-end models and the 10 FPS threshold fairly represent what autonomous-driving hardware must run, so the Figure 8 measurements can stand in for the full software stack.

Editorial extensions

If this is right

  • If the heterogeneity claim is right, next-generation automotive SoCs will need to co-design general-purpose CPU/GPU cores with task-specific accelerators and programmable fabric rather than relying on a single accelerator type.
  • Memory-bound layers identified by low arithmetic intensity become the natural targets for processing-in-memory cores, while compute-bound layers can stay on GPU or neural-network accelerators.
  • Because autonomous vehicles have 10- to 15-year lifespans, the winning hardware platforms will include programmable elements (FPGAs or CGRAs) so they can absorb software updates and new models.
  • The CPU-only path to level-4/5 autonomy becomes untenable if the 10 FPS threshold and the measured CPU results hold, reinforcing GPUs as the baseline and specialized accelerators as the next step.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

  • Editorial inference: the paper's proof-of-concept measurements would be much stronger if repeated on a standard benchmark suite covering full modular stacks (perception, prediction, planning) and end-to-end policies, since the chosen three models sample only part of the software space.
  • Editorial inference: the arithmetic-intensity evidence suggests the first PIM deployments in an autonomous vehicle would target LiDAR point-cloud preprocessing, sensor-fusion attention layers, and other low-intensity layers, but the paper does not commit to a specific placement.
  • Editorial inference: the 10 FPS threshold is treated as given, yet it is load-bearing; an independently sourced real-time requirement could shift the CPU-vs-GPU conclusion and deserves explicit validation.
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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Referee Report

4 major / 6 minor

Summary. This manuscript is a survey of autonomous driving (AD) software and hardware systems. It reviews sensor inputs, datasets, simulators, the modular and end-to-end software architectures, and commercial hardware platforms including GPUs, FPGAs, and SoCs such as Tesla FSD, NVIDIA DRIVE Orin, and Mobileye EyeQ6. It contributes a small benchmark study (Fig. 8) measuring FPS and FPS/W of three end-to-end models—TransFuser, InterFuser, and MILE—on four CPU/GPU systems, plus a layer-level arithmetic-intensity analysis of InterFuser (Fig. 9). On this basis, Sections V.B–V.D argue that single-type homogeneous hardware is suboptimal and that future AD accelerators will be increasingly heterogeneous, combining CPUs, GPUs, task-specific accelerators including PIM, and programmable logic such as FPGAs or CGRAs.

Significance. If its central thesis is accepted, the paper provides a useful organizing perspective for AD hardware design, aligning with industry trends in heterogeneous SoCs. Its main strength is the broad synthesis of current software and hardware stacks with specific commercial examples, and the attempt to ground a hardware argument in a small set of measurements rather than speculation. The benchmark data, however, are not currently sufficient to carry the heterogeneity conclusion: the measurements lack methodological detail and error bars, the '10 FPS' threshold is unsourced, and the test models do not span the diversity of the software stack described earlier. The qualitative conclusion is defensible and consistent with the literature, but the empirical support needs substantial strengthening. The paper is likely to be useful to practitioners and researchers entering the area, but in its present form it does not meet the standard for a fully supported experimental claim.

major comments (4)
  1. [§V.A, Fig. 8, Table VII] The quantitative claim in Section V.A that 'none of the CPUs solely—except for one with borderline results—can meet the minimum required performance of 10 FPS' is not supported by the information provided. There is no description of the measurement methodology: batch size, input resolution, precision, inference framework and version, CPU/GPU power states, number of runs, or the method used to compute FPS/W are all absent. The '10 FPS' threshold is asserted without any citation or derivation, and the single 'borderline' CPU data point cannot be interpreted without confidence intervals or run-to-run variance. Because this result is later cited in Section V.B as the 'brief demonstration' that single-type hardware is suboptimal, the missing methodology is load-bearing for the paper's hardware argument.
  2. [§V.A, Table VII] The comparison labeled CPU-only versus GPU-only is confounded by the system configurations. System 1 is a Jetson AGX Orin, which is a heterogeneous SoC containing both CPU and GPU on the same die, and System 2 is a laptop-class system with both a Ryzen 9 CPU and an RTX 3060 GPU. The paper does not state how 'CPU-only' execution was isolated (e.g., whether the GPU was disabled), how the GPU measurements were taken on the same systems, or how power and thermal sharing between the CPU and GPU affected the measurements. Without this information, the direct CPU-versus-GPU comparison in Fig. 8 is not reproducible and its validity is unclear.
  3. [§V.B, §V.D] The logical link from Fig. 8 to the heterogeneity thesis is incomplete. The benchmark compares different homogeneous CPU systems against different homogeneous GPU systems; it does not compare a homogeneous GPU-only configuration with a heterogeneous CPU+GPU+FPGA/CGRA/PIM configuration on the same workloads. Showing that these CPUs are slower than these GPUs on three end-to-end models does not demonstrate that 'managing these diverse models with a single type of hardware leads to suboptimal performance.' The paper should either add a direct homogeneous-versus-heterogeneous comparison or substantially soften the claim, explicitly stating that Fig. 8 supports only the narrower observation that the evaluated CPUs are less performant than the evaluated GPUs on these models.
  4. [§V.A, Table VI] The selection of TransFuser, InterFuser, and MILE is not justified as representative of the autonomous driving software stack surveyed in Section III. These three models are all transformer-based, camera+LiDAR, end-to-end driving models; they do not cover the diverse workloads described earlier, such as 2D/3D object detection CNNs (YOLO, VoxelNet, PointPillars), point-cloud networks, tracking, trajectory-prediction GNNs, or planning algorithms. The paper's conclusion that future accelerators must handle 'diverse computational and memory requirements' relies on this representativeness, but no argument or evidence is given that the three chosen models span that diversity. Without such justification, the empirical results in Fig. 8 and the layer analysis in Fig. 9 (which is only for InterFuser) cannot be generalized to the full AD stack.
minor comments (6)
  1. [§II.B] The KITTI dataset is cited as reference [17], which is actually the Contraction Hierarchies routing paper (Geisberger et al.); a proper citation for the KITTI vision benchmark suite is missing or mis-numbered.
  2. [§III.B.1] The text states that TransFuser uses 'ResNets [84] and RegNets [85]', but reference [85] is a model-predictive motion planner for the IARA car; the RegNet backbone should be cited to Radosavovic et al., which is already reference [90].
  3. [Fig. 8, Table VII] The device labels CPU_1 through GPU_4 in Fig. 8 are not mapped directly to the System 1–4 rows of Table VII, making the figure hard to interpret; adding a legend or using the system names directly would improve clarity.
  4. [§I (page 2)] There is a typo: 'To set he stage for this' should read 'To set the stage for this.'
  5. [§V.A] The sentence 'Worth noting is that these results indicate even a single GPU can exhibit varying performance and efficiency across different models' is grammatically awkward and should be rephrased for clarity.
  6. [§V.A] The statement that projections indicate autonomous vehicles 'will dominate 95% of the market by 2050' is an imprecise reading of reference [103], which is primarily about emissions from onboard computing; the claim should be reworded to match the source's actual projection (e.g., vehicle-miles traveled share) or removed.

Circularity Check

0 steps flagged · score 0.0 of 10

No significant circularity: the paper's benchmark and survey reasoning are externally grounded, and no prediction reduces to its inputs by construction.

full rationale

This paper is a survey with a speculative forward-looking conclusion, not a derivation chain in which outputs are fitted from inputs. Section V.A reports empirical FPS and FPS/W measurements of three published end-to-end models (TransFuser, InterFuser, MILE) on four CPU and four GPU systems. These measurements are not used to fit any parameter that is then renamed as a prediction; the numbers are external benchmark observations, and the conclusion that GPUs outperform CPUs on these workloads follows directly from the reported measurements. The central Section V.D claim, that future self-driving accelerators will be heterogeneous, is justified by the diverse computational and memory requirements of the surveyed software stack, by the architectural diversity of existing systems (Tesla FSD, DRIVE Orin, EyeQ6), and by qualitative arguments about sparsity and arithmetic intensity. Even though the CPU-vs-GPU comparison does not logically prove that heterogeneous architectures are necessary, that is an evidentiary gap or a weakness in inductive support, not circularity. There are no load-bearing self-citations: the references are to external prior work, and no uniqueness theorem or prior result by the same authors is invoked to force a conclusion. The unsourced 10 FPS threshold and missing measurement methodology are rigor concerns, but they do not make the argument circular. The paper is therefore self-contained against external benchmarks, and the appropriate circularity score is 0.

Assumptions & free parameters 1 free parameters · 3 assumptions · 0 invented entities

The central argument rests on three unstated assumptions about the benchmark: the selected models are representative, TDP approximates power, and the FPS measurements are reliable. The hand-chosen 10 FPS threshold is the only free parameter. No invented entities are introduced.

free parameters (1)
  • Minimum 10 FPS performance threshold = 10 FPS
    Section V.A sets 10 FPS as the minimum required performance for self-driving systems and uses it to judge CPUs; no citation or derivation is given, so it is a hand-chosen threshold that drives the conclusion that CPUs are insufficient.
assumptions (3)
  • ad hoc to paper The three end-to-end models TransFuser, InterFuser, and MILE are representative of the computational and memory demands of autonomous driving software stacks.
    Section V.A selects these three models without argument that they span perception, prediction, planning, and control workloads in real AD systems.
  • domain assumption TDP values from hardware specifications are an adequate proxy for power consumption when computing FPS/W efficiency.
    Fig. 8(b) labels efficiency as FPS/W using TDP values from Table VII; no measured power is reported.
  • domain assumption The reported FPS measurements are accurate despite the absence of a measurement methodology.
    The paper does not describe input resolution, batch size, precision, software versions, or number of runs behind Fig. 8.

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Cite this review

Pith. "Pith review of Moving Forward: A Review of Autonomous Driving Software and Hardware Systems." pith.science (2026). https://pith.science/paper/SAAVA7D5

@misc{pith2026241110291,
  author       = {Pith},
  title        = {Pith review of: Moving Forward: A Review of Autonomous Driving Software and Hardware Systems},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/SAAVA7D5}},
  note         = {Machine review of arXiv:2411.10291}
}
read the original abstract

With their potential to significantly reduce traffic accidents, enhance road safety, optimize traffic flow, and decrease congestion, autonomous driving systems are a major focus of research and development in recent years. Beyond these immediate benefits, they offer long-term advantages in promoting sustainable transportation by reducing emissions and fuel consumption. Achieving a high level of autonomy across diverse conditions requires a comprehensive understanding of the environment. This is accomplished by processing data from sensors such as cameras, radars, and LiDARs through a software stack that relies heavily on machine learning algorithms. These ML models demand significant computational resources and involve large-scale data movement, presenting challenges for hardware to execute them efficiently and at high speed. In this survey, we first outline and highlight the key components of self-driving systems, covering input sensors, commonly used datasets, simulation platforms, and the software architecture. We then explore the underlying hardware platforms that support the execution of these software systems. By presenting a comprehensive view of autonomous driving systems and their increasing demands, particularly for higher levels of autonomy, we analyze the performance and efficiency of scaled-up off-the-shelf GPU/CPU-based systems, emphasizing the challenges within the computational components. Through examples showcasing the diverse computational and memory requirements in the software stack, we demonstrate how more specialized hardware and processing closer to memory can enable more efficient execution with lower latency. Finally, based on current trends and future demands, we conclude by speculating what a future hardware platform for autonomous driving might look like.

Figures

Figures reproduced from arXiv: 2411.10291 by the authors.

Figure 1
Figure 1. Autonomous driving system modules. A high-level simplified view of an autonomous driving system is depicted in [PITH_FULL_IMAGE:figures/full_fig_p001_1.png] view at source ↗
Figure 2
Figure 2. System diagram of: (a) generic modular system, (b) end-to-end system. [PITH_FULL_IMAGE:figures/full_fig_p003_2.png] view at source ↗
Figure 3
Figure 3. The Apollo system-driving framework based on version 9.0 with only perception breakdown for clarity. [PITH_FULL_IMAGE:figures/full_fig_p006_3.png] view at source ↗
Figures from the paper (7 more)
Figure 4
Figure 4. Figure 4: An overview of transformer-based TransFuser archi [PITH_FULL_IMAGE:figures/full_fig_p007_4.png]
Figure 5
Figure 5. Figure 5: An overview of transformer-based InterFuser architec [PITH_FULL_IMAGE:figures/full_fig_p007_5.png]
Figure 6
Figure 6. Figure 6: Simplified system diagram of Tesla’s autonomous system. [PITH_FULL_IMAGE:figures/full_fig_p008_6.png]
Figure 7
Figure 7. Figure 7: (a) Conventional CPU+GPU-based system, (b) Integrating an FPGA as a data processor on CPU+GPU-based system [PITH_FULL_IMAGE:figures/full_fig_p008_7.png]
Figure 8
Figure 8. Figure 8: (a) Performance (in terms of Frame Per Seconds) of the three end-to-end systems on various devices (b) Efficiency (in [PITH_FULL_IMAGE:figures/full_fig_p010_8.png]
Figure 9
Figure 9. Figure 9: (a) The arithmetic intensity of sample layers in the InterFuser AD system versus memory operations (reading data from [PITH_FULL_IMAGE:figures/full_fig_p011_9.png]
Figure 10
Figure 10. Figure 10: Architecture of TETRIS accelerator adopted from [PITH_FULL_IMAGE:figures/full_fig_p011_10.png]

Discussion (0). Continue with ORCID to comment.

Forward citations

Cited by 1 Pith paper

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. Open-Source Autonomous Driving Software Platforms: Comparison of Autoware and Apollo

    cs.RO 2025-01 conditional novelty 4.0 of 10

    Autoware and Apollo differ in module design, and Apollo's shared-memory middleware is faster but more memory-hungry than Autoware's serialized DDS middleware.

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Pith tools

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