Pith. sign in

REVIEW 8 cited by

DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysis

Not yet reviewed by Pith; the record is open.

This paper has not been read by Pith yet. Machine review is queued; the pith claim, tier, and objections will appear here once it completes.

SPECIMEN: schema-true, not a live event

T0 review · schema-true

One-sentence machine reading of the paper's core claim.

pith:XXXXXXXX · record.json · timestamp

arxiv 2502.18297 v1 pith:CE3WEWOJ submitted 2025-02-25 cs.LG cs.PL

classification cs.LGcs.PL
keywords codedatasetdeepcircuitxgenerationunderstandinganalysisannotationscomprehensive
verification ladder T0 review T1 audit T2 compute T3 formal
0 comments
read the original abstract

This paper introduces DeepCircuitX, a comprehensive repository-level dataset designed to advance RTL (Register Transfer Level) code understanding, generation, and power-performance-area (PPA) analysis. Unlike existing datasets that are limited to either file-level RTL code or physical layout data, DeepCircuitX provides a holistic, multilevel resource that spans repository, file, module, and block-level RTL code. This structure enables more nuanced training and evaluation of large language models (LLMs) for RTL-specific tasks. DeepCircuitX is enriched with Chain of Thought (CoT) annotations, offering detailed descriptions of functionality and structure at multiple levels. These annotations enhance its utility for a wide range of tasks, including RTL code understanding, generation, and completion. Additionally, the dataset includes synthesized netlists and PPA metrics, facilitating early-stage design exploration and enabling accurate PPA prediction directly from RTL code. We demonstrate the dataset's effectiveness on various LLMs finetuned with our dataset and confirm the quality with human evaluations. Our results highlight DeepCircuitX as a critical resource for advancing RTL-focused machine learning applications in hardware design automation.Our data is available at https://zeju.gitbook.io/lcm-team.

Discussion (0). Continue with ORCID to comment.

Forward citations

Cited by 8 Pith papers

Reviewed papers in the Pith corpus that reference this work. Sorted by Pith novelty score. Full citation record

  1. PhoenixRepair: Rethinking Repair Strategy Exploration in Software Agents

    cs.AI 2026-07 conditional novelty 6.0 of 10

    A multi-agent repair framework that samples multiple edit locations and iteratively reflects on patch attempts reaches 76.0% Pass@1 on SWE-bench-Verified, up to a 7.8% relative gain over SWE-agent.

  2. Better Call Grep: Evaluating and Improving Grep-Like Lexical Retrieval for Repository-Level Code Completion

    cs.SE 2026-01 conditional novelty 6.0 of 10

    LLM-generated ripgrep queries plus BM25 re-ranking and line-interval de-duplication outperform graph- and RL-based retrievers for repository-level code completion on CrossCodeEval and RepoEval-Updated.

  3. MACO: A Multi-Agent LLM Framework for Automated CGRA Hardware/Software Co-Design

    cs.AR 2025-09 reject novelty 6.0 of 10

    A multi-agent LLM framework that iteratively co-designs CGRA hardware and software parameters, reporting power and performance improvements over LLM and manual baselines.

  4. Beyond Tokens: Enhancing RTL Quality Estimation via Structural Graph Learning

    cs.LG 2025-08 conditional novelty 6.0 of 10

    StructRTL uses self-supervised learning on control data flow graphs, plus knowledge distillation from post-mapping netlists, to beat prior LLM-based methods for predicting circuit area and delay from RTL code on a 13,...

  5. MMCircuitEval: A Comprehensive Multimodal Circuit-Focused Benchmark for Evaluating LLMs

    cs.LG 2025-07 conditional novelty 6.0 of 10

    A new multimodal benchmark of 3,614 circuit QA pairs shows that large language models perform worst on back-end layout and computation tasks, and that current models generally underperform on circuit design questions.

  6. ForgeHLS: A Large-Scale, Open-Source Dataset for High-Level Synthesis

    cs.AR 2025-07 conditional novelty 6.0 of 10

    ForgeHLS provides 459,850 designs drawn from 846 real-world and GPT-generated kernels to support ML-based high-level synthesis prediction and pragma optimization.

  7. DeepRTL2: A Versatile Model for RTL-Related Tasks

    cs.AR 2025-05 reject novelty 6.0 of 10

    DeepRTL2 claims state-of-the-art results across RTL generation, understanding, code search, equivalence checking, and performance prediction, but the evidence is weakened by benchmark construction issues and a contrad...

  8. DeepCell: Self-Supervised Multiview Fusion for Circuit Representation Learning

    cs.LG 2025-02 conditional novelty 6.0 of 10

    DeepCell fuses AIG and post-mapping netlist views with masked autoencoding, achieving 2.77% lower ECO patch cost and 15-16% lower area-delay product in technology mapping.

Pith tools