Memory Under Siege: A Comprehensive Survey of Side-Channel Attacks on Memory

MD Mahady Hassan; Reza Rahaeimehr; Shanto Roy

REVIEW 4 major objections 4 minor 285 references

Memory Under Siege: A Comprehensive Survey of Side-Channel Attacks on Memory

T0 review · 4 major / 4 minor · reviewed 2026-08-15 · deepseek-v4-flash

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Pith's one-line read A review proposes five categories that organize memory side-channel attacks and their defenses.

desk verdict Useful broad map of memory side-channel work, but the taxonomy is a thematic grouping rather than a rigorous classification, and citation errors undercut its reliability as a reference. read the letter →

arxiv 2505.04896 v1 pith:OK2DI5GA submitted 2025-05-08 cs.CR

MD Mahady Hassan , Shanto Roy , Reza Rahaeimehr This is my paper · ORCID

classification cs.CR

keywords side-channelattacksmemorysidechannelscachetiminginformationleakagemicroarchitecturalvulnerabilities

verification ladder T0 review T1 audit T2 compute T3 formal

The pith

A machine-rendered reading of the paper's core claim, the machinery that carries it, and where it could break.

The reading

This survey argues that every side-channel attack on memory can be filed into one of five categories: timing-based attacks, access-pattern attacks, signal-based attacks, fault-injection attacks, and resource-contention attacks. It pairs each category with subcategories and comparison tables that record attack type, target hardware, platform, impact, and mitigations. If the taxonomy holds, researchers and practitioners gain a common vocabulary for organizing a scattered literature, and defenders can match attacks to countermeasures by category. The contribution is organizational: it turns a diverse set of microarchitectural leakages into a single framework for understanding and defense.

What carries the argument

The central object is the taxonomy presented in Figure 1, a tree with SCAM at the root and five branches (TBA, APA, SBA, FIA, RCA), each with three or four subcategories. Tables 1 through 5 operationalize the taxonomy by listing representative attacks with fields for attack type, methodology, platform (Intel, AMD, ARM, cross), target, impact, and hardware or software mitigations, while Table 6 maps defense techniques and their implementation levels to attack categories. The taxonomy carries the argument by giving every discussed attack a cell, and the tables give each cell concrete evidence.

What would settle it

A documented memory side-channel attack that cannot be placed in any of the five categories, or that demonstrably fits two categories at once, would falsify the taxonomy's claims of comprehensiveness and mutual exclusivity. One concrete test is to take the paper's own examples, such as Prime+Abort or Rowhammer, and attempt to assign each to exactly one leaf of Figure 1; any forced double assignment would show the categories overlap.

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Extended reading notes

Core claim

The paper proposes and defends the SCAM taxonomy: side-channel attacks on memory fall into five primary categories, Timing-Based Attacks (TBA), Access Pattern Attacks (APA), Signal-Based Attacks (SBA), Fault Injection Attacks (FIA), and Resource Contention Attacks (RCA), each with subcategories such as transient and speculative execution, cache timing, paging timing, enclave access, memory deduplication, power, electromagnetic and thermal leakage, Rowhammer and DRAM faults, cold boot, DMA, cross-VM, bus and network, and GPU attacks. For each category it provides a comparison table and a mitigation table mapping defense techniques, implemented in hardware, software, or a hybrid way, to attack categories. The claim is that this five-way split, together with the mitigation mapping, is comprehensive enough to organize the existing literature and guide future defense.

Load-bearing premise

The taxonomy's claim to cover every memory side-channel attack in exactly one category rests on the authors' selection of representative examples, not on a documented, exhaustive search of the literature; if an attack falls outside the five categories or into two at once, the framework loses its organizing power.

Editorial extensions

If this is right

A newly discovered memory side-channel attack can be classified by its mechanism first, then matched to one of the five categories and, through Table 6, to a set of candidate mitigations.
Defenders can prioritize category-level defenses, such as cache randomization and speculation barriers for timing and access-pattern attacks, signal shielding for signal attacks, row-refresh and DMA protection for fault-injection attacks, and scheduling and cache isolation for contention attacks.
The comparison tables expose coverage gaps, showing which platforms, such as AMD and ARM, and which mitigation strategies are underexplored for particular attack types.
The taxonomy gives cloud and enclave security researchers a shared vocabulary for cross-VM, GPU, and memory-deduplication leaks that were previously treated as separate problems.

Reading between the lines

Editorial extensions of the paper, not claims the author makes directly.

The paper leaves implicit that the five categories are not cleanly disjoint in practice: Rowhammer appears under fault injection while its timing effects are discussed under execution timing attacks, so a future classifier would need a precedence rule for such straddling cases.
The taxonomy could be tested mechanically by coding each cited attack by its mechanism and checking that every attack lands in exactly one leaf of Figure 1, converting the asserted comprehensiveness into a checkable claim.
A neighbouring problem the framework could absorb is side channels in non-volatile memory and compute-in-memory accelerators, which the paper touches mainly in its mitigation discussion; those attacks would likely straddle the signal-based and resource-contention categories.

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Editorial analysis

A structured set of objections, weighed in public.

Desk editor's note, referee report, and a circularity audit.

Desk Editor's Note

read the letter

Short version: this is a useful broad map of memory side-channel work, but the 'comprehensive taxonomy' is a thematic grouping, not a classification, and the citation errors make it a reference you want to double-check.\n\nWhat is new is not any attack or defense — all the attack families are known — but the packaging: five primary categories (TBA, APA, SBA, FIA, RCA), subcategory mappings, side-by-side comparison tables, and an attack-to-mitigation mapping. That genuinely helps orient someone new to the field, and the coverage is wide: caches, speculative execution, enclaves, power/EM/thermal, Rowhammer, cold boot, DMA, cross-VM, and GPU.\n\nThe soft spots are in the classification and the citations. The stress-test note is correct: the five categories are not mutually exclusive. Rowhammer appears under both TBA (execution timing) and FIA (DRAM vulnerability); Zhang et al. 2012 appears under TBA cache timing and RCA cross-VM; Van Bulck et al. 2017 and Xu et al. 2015 appear under both TBA paging and APA. Plundervolt is listed under access-pattern attacks even though it is a voltage fault-injection attack. There is no decision rule for overlap, so 'classifies into five primary categories' is asserted rather than demonstrated. The concrete citation errors matter because a survey's value is reliability: Section 4.5.1 attributes the prefetcher attack to Chen et al. but reference [98] is Guo et al., and Section 4.5.3 attributes the GPU scheduling attack to [176], which is actually Naghibijouybari et al.\n\nThese flaws do not sink the paper. As a thematic survey it works, and a revision that acknowledges overlap and audits citations would be a solid resource. But 'comprehensive classification' overstates what is here. No machine-checked artifacts, no new measurements, and no search protocol backing the completeness claim.\n\nWho this is for: someone wanting a quick map of the space or a starting bibliography. Not for someone needing a rigorous classification or new results. It deserves peer review with expectation of heavy revision, mainly to reframe the taxonomy and fix citations.

Referee Report

4 major / 4 minor

Summary. The manuscript surveys side-channel attacks on memory (SCAM) and proposes a taxonomy with five primary categories: Timing-Based Attacks (TBA), Access Pattern Attacks (APA), Signal-Based Attacks (SBA), Fault Injection Attacks (FIA), and Resource Contention Attacks (RCA). Section 4 describes attacks in these categories and includes comparison tables, while Section 5 maps mitigation strategies to attack categories across hardware, software, cryptographic, isolation, and detection levels. The paper's stated contribution is a comprehensive and unified classification of memory side-channel attacks, intended to help researchers and practitioners understand and mitigate the threat.

Significance. If the taxonomy were made rigorous, the survey could serve as a useful reference and entry point to the field. The paper assembles a broad corpus covering speculative execution, SGX, DRAM, GPU, and physical-emanation attacks, and it connects attacks to mitigation classes in a way that many narrower surveys do not. The comparison tables and the mitigation table are helpful organizational devices. However, the central claim of a five-category classification is currently not demonstrated because the same attacks appear in multiple primary categories without a stated assignment rule, and several concrete citation errors reduce confidence in the survey's reliability. The value of the paper depends on resolving these issues.

major comments (4)

[§3, §4.1.4, §4.4.1, Tables 1 and 5] The five-category taxonomy is not mutually exclusive as presented. The criteria for TBA (timing), APA (patterns), SBA (signals), FIA (faults), and RCA (contention) are not orthogonal, and the same attacks are placed in multiple primary categories: Rowhammer and Drammer are treated as execution-timing attacks in §4.1.4 and as fault-injection DRAM vulnerability attacks in §4.4.1; Zhang et al. (2012) appears in §4.1.2 as a cache timing attack and in §4.5.1 as a cross-VM shared resource attack, and it appears in both Tables 1 and 5; Van Bulck et al. (2017) and Xu et al. (2015) appear in both PTA (§4.1.3) and SEA/PTEA (§4.2). The paper gives no decision procedure for assigning an attack to exactly one category or for handling attacks that exploit multiple mechanisms. A taxonomy that classifies attacks must either enforce disjoint membership or explicitly define overlapping categories; otherwise the claim that the taxonomy classifies SCAM into five categories is not supported. I ask the authors to define the classification rule, re-assign the repeated entries, and add cross-reference notes where overlap is intentional.
[§4.5.1 and §4.5.3, references [98] and [176]] Several concrete citation errors undermine the survey's reliability. In §4.5.1, the text states that 'Chen et al. later revealed how modern prefetchers can be misused' and cites [98], but reference [98] is Guo et al., 'Adversarial Prefetch', not Chen et al.; the Chen et al. PrefetchX work is [40], which is described in the next sentence. In §4.5.3, the text attributes a GPU scheduling attack to 'Zhou et al. [176]', but [176] is Naghibijouybari et al., 'Rendered Insecure'. These are not formatting details: a survey's value depends on accurate mapping between described attacks and cited papers. A full citation audit against the bibliography is needed.
[Abstract and §3] The comprehensiveness claim is not backed by a reproducible methodology. The abstract calls the taxonomy 'comprehensive', and Section 3 introduces the five categories as an assertion, but the manuscript does not state a search protocol, inclusion and exclusion criteria, a corpus of candidate papers, or a validation procedure showing that the five categories cover all memory side-channel attacks. Without this, the reader cannot audit whether omitted attacks are missing by design or by accident. Please add a methodology subsection that describes how the literature was collected and how coverage and category assignments were verified.
[Table 2] Table 2 lists Murdock et al. (2020), Plundervolt, under Secure Enclave Attacks (SEA) in the Access Pattern Attacks category, although Plundervolt is a voltage fault-injection attack that the paper's own FIA definition would place under FIA. This misassignment is a concrete instance of the same attack appearing in a category inconsistent with the taxonomy's own definitions, and it should be corrected when the classification rule is applied.

minor comments (4)

[Title and headings] The title and many headings contain artifacts such as 'A/t_tacks' and 'Pa/t_tern'; these should be cleaned throughout the manuscript.
[References] Reference [121] is incomplete: it has no publication venue or year and is only labeled '[n.d.] SLAP...'; full bibliographic data should be supplied.
[Table 2] Table 2 lists Suzaki et al. (2011) twice with different methodology descriptions; either merge the entries or clearly distinguish the two different papers.
[§6] Section 6 places 'Related Work' inside the conclusion (Section 6.1) after the main discussion; moving related work to an earlier section would improve the narrative structure.

Circularity Check

0 steps flagged · score 0.0 of 10

No circularity: the taxonomy is assembled from external attack literature, and no fitted prediction or self-citation chain is load-bearing.

full rationale

The paper's central claim is a classification taxonomy for memory side-channel attacks, proposed in Section 3: "we propose a taxonomy that classifies side-channel attacks on memory into five primary categories." This taxonomy is constructed from the surveyed external literature and is descriptive rather than derived from a target result. There are no equations, no fitted parameters, and no quantity is predicted from a model whose inputs include the claimed output. The attack descriptions in Section 4 and mitigation tables in Section 5 are summaries of prior published work, not reductions. The only self-citation, Roy et al. [193], supports a general background statement about the rise of cyber attacks and does not feed into the taxonomy, its categories, or any mitigation claim. Concerns about category overlap or the absence of an explicit inclusion protocol are validity and completeness concerns, not circularity: even if Rowhammer appears under both ETA and DVA, that is an inconsistency in the survey's organization, not the derivation of a result from its own assumptions. No step in the paper's reasoning equates an output with an input, and no load-bearing premise is justified solely by a self-citation. Therefore the circularity score is 0.

Assumptions & free parameters 0 free parameters · 3 assumptions · 0 invented entities

The survey's central claim depends on two unverified domain assumptions: the representative completeness of the selected literature and the validity of the five-way partition. No numerical parameters are fit and no new entities are postulated.

assumptions (3)

domain assumption The literature surveyed is representative of all memory side-channel attacks.
Comprehensiveness is asserted in the abstract and Section 1, but no systematic search protocol or inclusion criteria are provided; mis-citations suggest coverage may be uneven.
domain assumption The five categories (TBA, APA, SBA, FIA, RCA) are exhaustive and mutually exclusive.
Section 3 introduces the taxonomy without a derivation or validation; attacks are assigned to one category each, but overlap is possible, for example Rowhammer appears under FIA while some Rowhammer timing effects are discussed under execution timing attacks.
domain assumption Each cited attack is described accurately and the cited reference supports the sentence that cites it.
The whole survey rests on the fidelity of its citations; several mis-attributions in Section 4.5.1 and Section 4.5.3 show this assumption is not fully met.

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Pith. "Pith review of Memory Under Siege: A Comprehensive Survey of Side-Channel Attacks on Memory." pith.science (2026). https://pith.science/paper/OK2DI5GA

@misc{pith2026250504896,
  author       = {Pith},
  title        = {Pith review of: Memory Under Siege: A Comprehensive Survey of Side-Channel Attacks on Memory},
  year         = {2026},
  howpublished = {\url{https://pith.science/paper/OK2DI5GA}},
  note         = {Machine review of arXiv:2505.04896}
}

read the original abstract

Side-channel attacks on memory (SCAM) exploit unintended data leaks from memory subsystems to infer sensitive information, posing significant threats to system security. These attacks exploit vulnerabilities in memory access patterns, cache behaviors, and other microarchitectural features to bypass traditional security measures. The purpose of this research is to examine SCAM, classify various attack techniques, and evaluate existing defense mechanisms. It guides researchers and industry professionals in improving memory security and mitigating emerging threats. We begin by identifying the major vulnerabilities in the memory system that are frequently exploited in SCAM, such as cache timing, speculative execution, \textit{Rowhammer}, and other sophisticated approaches. Next, we outline a comprehensive taxonomy that systematically classifies these attacks based on their types, target systems, attack vectors, and adversarial capabilities required to execute them. In addition, we review the current landscape of mitigation strategies, emphasizing their strengths and limitations. This work aims to provide a comprehensive overview of memory-based side-channel attacks with the goal of providing significant insights for researchers and practitioners to better understand, detect, and mitigate SCAM risks.

Figures

Figures reproduced from arXiv: 2505.04896 by the authors.

**Figure 1.** SCAM Taxonomy 4 Side Channel A acks on Memory (SCAM) This section expands upon the SCAM taxonomy introduced earlier by systematically analyzing each of the five primary categories of side-channel attacks on memory, along with their subcategories. The goal is to provide a detailed understanding of the underlying mechanisms, attack surfaces and practical implications. Each subsection discusses attack strategies, leak… view at source ↗

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