Paper Citation Record · LEDGER

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors

As of 19 August 2026, this Paper Citation Record lists 29 of 29 outbound references and 2 inbound Pith citation observations for arXiv:2505.09610.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2505.09610 v1

Coverage vector

measured 29 of 29 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-08-15T21:31:23.530462Z

measured 31 of 31 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-19T06:32:44.657259+00:00

measured 2 of 2 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links, observed 2026-08-05T05:50:29.915922Z

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: pith, observed 2026-08-05T05:50:30.008585Z

Reference resolution

29 of 29 outbound references displayed

verified exact0
verified fuzzy17
unresolved12
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation a4b270a0-3ea6-441d-92c5-7c64cb1a0780 · outbound

This paper cites Machine learning for electronic design automation: A survey,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Machine learning for electronic design automation: A survey,

Reference 1

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.966890Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 746e5397-de4c-47f1-ac7a-ec9d11a8247a · outbound

This paper cites Mlcad: A survey of research in machine learning for cad keynote paper,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Mlcad: A survey of research in machine learning for cad keynote paper,

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.956358Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 329d3e58-f3ae-41d8-858c-75595eaf0e6d · outbound

This paper cites ChipNeMo: Domain-Adapted LLMs for Chip Design.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors ChipNeMo: Domain-Adapted LLMs for Chip Design

Reference 3

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.423752Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation aef8679b-d411-402e-acb1-2f5d50c78e12 · outbound

This paper cites Chipgpt: How far are we from natural language hardware design,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Chipgpt: How far are we from natural language hardware design,

Reference 4

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.428133Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation d702b4b9-d977-44f5-925c-ff9324fdd778 · outbound

This paper cites Chip-chat: Challenges and opportunities in con- versational hardware design,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Chip-chat: Challenges and opportunities in con- versational hardware design,

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.945024Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 0f378ed7-3812-4d16-ac00-d08e175c95f2 · outbound

This paper cites Chateda: A large language model powered autonomous agent for eda,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Chateda: A large language model powered autonomous agent for eda,

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.931774Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 636de9e3-2d26-412e-8eee-c91fcf000dcc · outbound

This paper cites Openroad-assistant: An open-source large language model for physical design tasks,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Openroad-assistant: An open-source large language model for physical design tasks,

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.920508Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 3e16121f-3715-473e-a91d-c064561e6c86 · outbound

This paper cites C2hlsc: Can llms bridge the software-to-hardware design gap?.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors C2hlsc: Can llms bridge the software-to-hardware design gap?

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.909553Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 039cb676-8b99-47cb-8203-212f4d9f6ef1 · outbound

This paper cites Automated c/c++ program repair for high-level synthesis via large language models,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Automated c/c++ program repair for high-level synthesis via large language models,

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.897179Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 1f4aa615-d924-439b-8775-bba7b8fe1b9f · outbound

This paper cites (Security) Assertions by Large Language Models.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors (Security) Assertions by Large Language Models

Reference 10

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.450458Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 0fe90b64-c2a9-4e53-bec5-49ec33d4b498 · outbound

This paper cites AutoChip: Automating HDL Generation Using LLM Feedback.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors AutoChip: Automating HDL Generation Using LLM Feedback

Reference 11

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.454589Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 8758b903-0278-40a9-b49f-76c7cad7d573 · outbound

This paper cites Rtllm: An open-source benchmark for design rtl gener- ation with large language model,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Rtllm: An open-source benchmark for design rtl gener- ation with large language model,

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.884553Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 4b96155c-79aa-4521-8270-f4e9a8ab2449 · outbound

This paper cites Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Make Every Move Count: LLM-based High-Quality RTL Code Generation Using MCTS

Reference 13

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.462508Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 2b5c9265-401f-416d-8990-4692636023c6 · outbound

This paper cites Benchmarking large language models for automated verilog rtl code generation,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Benchmarking large language models for automated verilog rtl code generation,

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.872199Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 6d6271c6-7079-45ce-aa1a-26ae26273b8a · outbound

This paper cites Verigen: A large language model for verilog code generation,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Verigen: A large language model for verilog code generation,

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.859634Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation b39652fe-23e4-462f-bc24-5c93136627f3 · outbound

This paper cites Verilogeval: Evaluating large language models for verilog code generation,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Verilogeval: Evaluating large language models for verilog code generation,

Reference 16

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.847731Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation fc9b5158-4f04-4e5d-b247-30a3cbde0f10 · outbound

This paper cites Chain-of-descriptions: Improving code llms for vhdl code generation and summarization,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Chain-of-descriptions: Improving code llms for vhdl code generation and summarization,

Reference 17

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.833397Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 4592084d-b53d-4fd6-b947-4c172b7ee421 · outbound

This paper cites Ties-merging: Resolving interference when merging models,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Ties-merging: Resolving interference when merging models,

Reference 18

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.821144Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation ae5b6679-2895-49fa-a5d4-4ac82aff1747 · outbound

This paper cites ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolation.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolation

Reference 19

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.486344Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation bc81d48b-ca3e-4d16-a1c0-2aa0c1759741 · outbound

This paper cites Finetuned language models are zero-shot learners,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Finetuned language models are zero-shot learners,

Reference 20

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.809311Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 9300d89d-7929-4dcd-afa8-28042541b58f · outbound

This paper cites Instruction-Following Evaluation for Large Language Models.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Instruction-Following Evaluation for Large Language Models

Reference 21

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.497736Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 3ba1ebf5-c456-40fe-bfa2-70281298fec9 · outbound

This paper cites Data prep kit,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Data prep kit,

Reference 22

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.797243Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation d60fed8f-4b2f-43a2-b978-1ea5b9320511 · outbound

This paper cites StarCoder: may the source be with you!.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors StarCoder: may the source be with you!

Reference 23

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.505610Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation ab9aaf1c-3ad9-43b8-a276-1de451033f39 · outbound

This paper cites Granite Code Models: A Family of Open Foundation Models for Code Intelligence.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Granite Code Models: A Family of Open Foundation Models for Code Intelligence

Reference 24

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.509689Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation de0a2bb8-46f9-4b65-9c73-55d30ce989b6 · outbound

This paper cites Evaluating large language models trained on code,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Evaluating large language models trained on code,

Reference 25

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.784898Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation b6e15266-d687-4109-83b6-c188bcc10fe0 · outbound

This paper cites Sequence Transduction with Recurrent Neural Networks.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Sequence Transduction with Recurrent Neural Networks

Reference 26

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.522135Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 42a003e9-56d3-4426-9de4-28b4ccbd64c2 · outbound

This paper cites Large Language Monkeys: Scaling Inference Compute with Repeated Sampling.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Large Language Monkeys: Scaling Inference Compute with Repeated Sampling

Reference 27

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.526407Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Observation 9d402feb-29d9-4157-b4bf-3c00755a39f6 · outbound

This paper cites From decoding to meta-generation: Inference-time algorithms for large language models,.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors From decoding to meta-generation: Inference-time algorithms for large language models,

Reference 28

Resolution: verified fuzzy; raw_fallback, observed 2026-08-15T21:31:23.771557Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 557713c5-b2e2-455e-8f8d-94349938f52e · outbound

This paper cites Evaluating Large Language Models Trained on Code.

Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors Evaluating Large Language Models Trained on Code

Reference 2021

Resolution: unresolved; no resolver link, observed 2026-08-15T21:31:23.517472Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.

Pith citing papers

Observation df1baf80-5600-41ea-871f-9338f38236e2 · inbound

Revolution or Hype? Seeking the Limits of Large Models in Hardware Design cites this paper.

Revolution or Hype? Seeking the Limits of Large Models in Hardware Design Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors

Reference 41

Resolution: verified exact; local_arxiv, observed 2026-08-05T05:50:30.015038Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-19T06:32:44.657259+00:00.

Observation 730f1e3d-2717-4b0f-acd8-4ad95ce2e7df · inbound

MACO: A Multi-Agent LLM Framework for Automated CGRA Hardware/Software Co-Design cites this paper.

MACO: A Multi-Agent LLM Framework for Automated CGRA Hardware/Software Co-Design Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors

Reference 4

Resolution: unresolved; no resolver link, observed 2026-08-04T16:31:32.395183Z

Source-reported events for the cited work

Unavailable: canonical work link unavailable.