Paper Citation Record · LEDGER

Chiplet-Based RISC-V SoC with Modular AI Acceleration

As of 13 August 2026, this Paper Citation Record lists 19 of 19 outbound references and 0 inbound Pith citation observations for arXiv:2509.18355.

A citation records a reference. It does not transfer a finding from one paper to another.

pith.paper-citation-record.v1
2509.18355 v5

Coverage vector

measured 19 of 19 reference resolution

Typed states for the displayed outbound observations.

Source: paper_references, paper_reference_links, observed 2026-05-18T14:07:18.826032Z

measured 19 of 19 standing notices

One-hop event checks from named stored sources.

Source: scholarly_work_events, retraction_status_cache, observed 2026-08-13T06:32:02.005865+00:00

measured 0 of 0 inbound itemization

Pith citing papers itemized under the disclosed page cap.

Source: paper_references, paper_reference_links

measured 0 of 1 external citation measurements

A source-named dated measurement, never combined with another source.

Source: cited_works

Reference resolution

19 of 19 outbound references displayed

verified exact5
verified fuzzy14
unresolved0
parse uncertain0
malformed identifier0
metadata mismatch0

External citation measurements

No source-named external measurement is stored.

Outbound references

Observation d452d6be-656a-4315-a817-305c5d010849 · outbound

This paper cites Edge Intelligence: Paving the Way for a New Era of AI.

Chiplet-Based RISC-V SoC with Modular AI Acceleration Edge Intelligence: Paving the Way for a New Era of AI

Reference 1

Resolution: verified exact; arxiv_id, observed 2026-05-18T14:11:27.176126Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 6c14f73b-3deb-424d-97da-c0e8257a58d0 · outbound

This paper cites MobileNetV2: Inverted residuals and linear bottlenecks.

Chiplet-Based RISC-V SoC with Modular AI Acceleration MobileNetV2: Inverted residuals and linear bottlenecks

Reference 2

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.458803Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 1aff1da8-5c1d-4036-9d67-4ae4439e7fe2 · outbound

This paper cites Deep residual learning for image recognition.

Chiplet-Based RISC-V SoC with Modular AI Acceleration Deep residual learning for image recognition

Reference 3

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.455722Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 1312076f-7ee9-4cc2-9087-f5d02a0e60c8 · outbound

This paper cites Modeling statistical dopant fluctuations in MOS transistors.

Chiplet-Based RISC-V SoC with Modular AI Acceleration Modeling statistical dopant fluctuations in MOS transistors

Reference 4

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.467541Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation f78cd475-f364-41fd-aa1d-c4558d5a935f · outbound

This paper cites The use and evaluation of yield models in integrated circuit manufacturing.

Chiplet-Based RISC-V SoC with Modular AI Acceleration The use and evaluation of yield models in integrated circuit manufacturing

Reference 5

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.464680Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 22321e8a-e5c7-4968-ad63-b2f7f00ffffb · outbound

This paper cites TAP-2.5D: A thermally-aware chiplet placement framework for 2.5D systems.

Chiplet-Based RISC-V SoC with Modular AI Acceleration TAP-2.5D: A thermally-aware chiplet placement framework for 2.5D systems

Reference 6

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.461729Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 0bfc9c88-d608-4fec-82c3-505c0a2537a6 · outbound

This paper cites High-performance, power-efficient three-dimensional chiplet systems.

Chiplet-Based RISC-V SoC with Modular AI Acceleration High-performance, power-efficient three-dimensional chiplet systems

Reference 7

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.427434Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation a3b6d085-e785-48d9-8a59-8fdb3e952b1c · outbound

This paper cites A 17–95.6 TOPS/W deep learning inference accelerator with per-vector scaled 4-bit quantization in 5 nm.

Chiplet-Based RISC-V SoC with Modular AI Acceleration A 17–95.6 TOPS/W deep learning inference accelerator with per-vector scaled 4-bit quantization in 5 nm

Reference 8

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.452468Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation a7a809e8-05aa-469b-b2c7-d6f3200ec44c · outbound

This paper cites High Bandwidth Memory (HBM3) DRAM Standard JESD238.

Chiplet-Based RISC-V SoC with Modular AI Acceleration High Bandwidth Memory (HBM3) DRAM Standard JESD238

Reference 9

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.449222Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation d187649c-328e-4753-8508-7d7f50fc1f09 · outbound

This paper cites HBM3 stacking and integration challenges.

Chiplet-Based RISC-V SoC with Modular AI Acceleration HBM3 stacking and integration challenges

Reference 10

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.445768Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation f2ebc85d-16d6-4574-bfbd-9e363e53536a · outbound

This paper cites Fine-grained DVFS using on-chip regulators.

Chiplet-Based RISC-V SoC with Modular AI Acceleration Fine-grained DVFS using on-chip regulators

Reference 11

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.430209Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 9832bf27-7eed-47fd-b185-7584efffa71d · outbound

This paper cites Adaptive DVFS and thread packing under power caps.

Chiplet-Based RISC-V SoC with Modular AI Acceleration Adaptive DVFS and thread packing under power caps

Reference 12

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.442841Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 9507ec59-96b3-4e13-be7d-17166719ba35 · outbound

This paper cites 2.5D root of trust: Secure system-level integration of untrusted chiplets.

Chiplet-Based RISC-V SoC with Modular AI Acceleration 2.5D root of trust: Secure system-level integration of untrusted chiplets

Reference 13

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.439759Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 159d71e7-86d3-4c68-9ad6-872f74eebf3c · outbound

This paper cites Temperature-aware microarchitecture: Modeling and implementation.

Chiplet-Based RISC-V SoC with Modular AI Acceleration Temperature-aware microarchitecture: Modeling and implementation

Reference 14

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.433081Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 9fd787e4-f958-4ffd-816e-1cb883f601bb · outbound

This paper cites Thermal management for 3D-stacked systems via unified DVFS and load power management.

Chiplet-Based RISC-V SoC with Modular AI Acceleration Thermal management for 3D-stacked systems via unified DVFS and load power management

Reference 15

Resolution: verified fuzzy; raw_fallback, observed 2026-05-18T14:12:40.436623Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 758492a7-f56b-415c-b207-a2363ba3ff2e · outbound

This paper cites System level analysis of fast, per-core DVFS using on-chip switching regulators.

Chiplet-Based RISC-V SoC with Modular AI Acceleration System level analysis of fast, per-core DVFS using on-chip switching regulators

Reference 16

Resolution: verified exact; arxiv_id, observed 2026-05-18T14:11:27.188148Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation e8780685-aa93-4a5c-a781-309bda748a27 · outbound

This paper cites Fine-Grained DVFS Using On-Chip Regulators.

Chiplet-Based RISC-V SoC with Modular AI Acceleration Fine-Grained DVFS Using On-Chip Regulators

Reference 17

Resolution: verified exact; arxiv_id, observed 2026-05-18T14:11:27.180535Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 04ef1c6f-8271-4d5c-8350-67ecf6ce3dad · outbound

This paper cites UCIe: Standard for an Open Chiplet Ecosystem.

Chiplet-Based RISC-V SoC with Modular AI Acceleration UCIe: Standard for an Open Chiplet Ecosystem

Reference 18

Resolution: verified exact; arxiv_id, observed 2026-05-18T14:11:27.184658Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Observation 11e835b0-3ad1-404a-9492-636a8faabcc9 · outbound

This paper cites AuthenTree: A Scalable MPC-Based Distributed Trust Architecture for Chiplet-based Heterogeneous Systems.

Chiplet-Based RISC-V SoC with Modular AI Acceleration AuthenTree: A Scalable MPC-Based Distributed Trust Architecture for Chiplet-based Heterogeneous Systems

Reference 19

Resolution: verified exact; arxiv_id, observed 2026-05-18T14:11:27.671253Z

Source-reported events for the cited work

No event found in the named queried sources as of 2026-08-13T06:32:02.005865+00:00.

Pith citing papers

No inbound Pith citation observations are available.